8978results about "Fixed capacitor dielectric" patented technology

Tunable dielectric materials including an electronically tunable dielectric ceramic and a low loss glass additive are disclosed. The tunable dielectric may comprise a ferroelectric perskovite material such as barium strontium titanate. The glass additive may comprise boron, barium, calcium, lithium, manganese, silicon, zinc and / or aluminum-containing glasses having dielectric losses of less than 0.003 at 2 GHz. The materials may further include other additives such as non-tunable metal oxides and silicates. The low loss glass additive enables the materials to be sintered at relatively low temperatures while providing improved properties such as low microwave losses and high breakdown strengths.

A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of first and second polarity electrode layers. Internal and / or external anchor tabs may also be selectively interleaved with the dielectric layers. Portions of the electrodes and anchor tabs are exposed along the periphery of the electronic component in respective groups and thin-film plated deposition is formed thereon by electroless and / or electrolytic plating techniques. A solder dam layer is provided over a given component surface and formed to expose predetermined areas where solder barrier and flash materials may be deposited before attaching solder preforms. Some embodiments include plated terminations substantially covering selected component surfaces to facilitate with heat dissipation and signal isolation for the electronic components.

A feedthrough terminal assembly for an active implantable medical device utilizes an insert to establish a reliable electrical connection between capacitor electrode plates, via inner surface metallization of a capacitor aperture, and an associated terminal pin 10, which passes at least partially therethrough. The inserts are preferably resiliently flexible, such as a spring, to establish this connection. The insert also serves to establish a mechanical connection between the capacitor and the terminal pin.

Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on top and bottom sides of a monolithic structure can facilitate the formation of wrap-around plated terminations. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and termination materials may be employed in the formation of the subject self-determining plated terminations.

A terminal to, most commonly, a ceramic capacitor, most commonly a multilayer ceramic capacitor (MLCC), is formed by electroless plating, also known as electroless deposition or simply as electrodeposition. In the MLCC having a multiple parallel interior plates brought to, and exposed at, at least one, first, surface, an electrically-conductive first-metal layer, preferably Cu, is electrolessly deposited upon this first surface directly in contact with, mechanically connected to, and electrically connected to, the edges of these interior plates. Lateral growth of the electrolessly-deposited first-metal is sufficient to span from exposed plate to exposed plate, electrically connecting the plates. One or more top layers, preferably one of Ni and one of Sn and Pb, are deposited, preferably by plating and more preferably by electrolytic plating, on top of the electrolessly-deposited Cu.