42results about How to "Solving Mismatch Problems" patented technology

The invention discloses a time-domain interleaving analog-to-digital converter and electronic equipment. The time-domain interleaving analog-to-digital converter includes a plurality of parallel-connected sub-ADC converters, a reference ADC converter, and a plurality of calibration modules, wherein the plurality of calibration The module is connected with multiple sub-ADC converters one by one to form multiple sub-ADC channels. The reference ADC converter simultaneously converts the analog signal sampled by each sub-ADC converter into a reference digital signal and outputs it to the corresponding calibration module. Each calibration module is based on The received digital signal and the corresponding reference digital signal perform self-calibration work. By controlling the clock signal, the sampling time of the reference ADC is continuously aligned with the sampling time of each sub-ADC converter, so that each calibration module performs self-calibration in a cyclic iteration. The transfer characteristic of each sub-ADC channel is infinitely close to the transfer characteristic of the reference ADC converter, thereby solving the problem of mismatch between each sub-ADC channel.

The invention discloses a method of forming a FinFET gate medium layer and a method of forming a FinFET. After monocrystal silicon is formed in an epitaxial manner on the surface of a semiconductor fin object, and a semiconductor substrate is annealed under a condition of mixed gas including deuterium and inert gas so that a transition layer is obtained. Therefore, problems of crystal lattice mismatch between a gate medium layer and the semiconductor fin object are solved. Moreover, the surface of the semiconductor fin object is reduced in roughness, a charge trapping center is prevented from forming, and then the performance of a semiconductor device is improved.