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168results about How to "Prevent characteristic deterioration" patented technology

Double split trench gate charge storage-type RC-IGBT and manufacturing method thereof

ActiveCN105742346AReduced carrier concentration distributionReduced short-circuit safe operating areaSemiconductor/solid-state device manufacturingSemiconductor devicesEngineeringFlyback diode
The invention belongs to the technical field of power semiconductor devices, and particularly relates to a reverse trench gate charge storage-type insulated gate bipolar transistor. Double split electrodes which are equal to an emitter in potential and dielectric layers between the double split electrodes and a gate electrode are introduced into the bottom part and the side surface of the gate electrode in a trench of an RC-IGBT device, so that the switching speed of the device in the IGBT working mode is improved; the carrier concentration distribution of the whole N-type drift region is improved; the switching loss of the device is reduced; the saturated current density of the device is reduced; the short-circuit safe operation area of the device is improved; the reliability is improved; a reverse free-wheeling diode has a low diode conduction voltage drop in a reverse free-wheeling diode working mode; the reverse recovery characteristics of the free-wheeling diode are improved; and meanwhile, the manufacturing method of the double split trench gate charge storage-type IGBT does not need to increase an extra processing step and is compatible with a traditional RC-IGBT manufacturing method.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Digital driving pixel circuit, driving method thereof and display panel

The embodiment of the invention discloses a digital driving pixel circuit, a driving method thereof and a display panel. The digital driving pixel circuit comprises a data writing module, a latch module, at least two light-emitting modules and light-emitting control modules in one-to-one correspondence with the light-emitting modules, the data writing module is used for controlling writing of datavoltage into the latch module; the latch module is used for latching data voltage; the light-emitting control module is used for alternate conduction; the at least two light-emitting modules are controlled to emit light alternately; further, the characteristic deterioration caused by long-time continuous work of the light-emitting module can be avoided; according to the digital drive circuit, theproblems of failure of the light-emitting modules and the like in the prior art are solved, so that each light-emitting module can release heat and be cooled after emitting light for a period of timeand when not emitting light, the temperature of each light-emitting module is not too high, good characteristics of the light-emitting modules are guaranteed, and the display effect of the display panel comprising the digital drive circuit is improved.
Owner:CHENGDU VISTAR OPTEOLECTRONICS CO LTD

Semiconductor memory having a defective memory cell relieving circuit

InactiveUS6879529B2Minimized area overhead and access time overheadImprove chip yieldDigital storageComputer architectureAccess time
In a semiconductor memory incorporating therein a circuit for relieving a defective memory cell, a memory cell array constituted of a number of main memory cells MC00 to MCij is added with one column of redundant memory cells MC0j+1 to MCij+1 and one word line of substitution information storing memory cells MCRA0 to MCRAj+1. In only a first cycle after the power supply is turned on, the substitution information DR0 to DRj is read out from the substitution information storing memory cells by use of a writing / reading circuit associated with the main memory cells, and is transferred to and held in a control circuit. In a second and succeeding cycles, the control circuit generates Y selection circuit control signals CS0 to CSj on the basis of the substitution information held in the control circuit, and a Y selection circuit is controlled by the control signals CS0 to CSj so as to selectively connect the columns other than a defective column to an input / output line. Thus, a chip area overhead attributable to the installation of the defective memory cell relief circuit is minimized. In addition, an address comparing circuit for a defective memory cell substitution is no longer necessary, and an access time overhead attributable to the address substitution operation does not occur.
Owner:NEC CORP

Array substrate, manufacturing method thereof and display device

The invention relates to the technical field of displaying, and discloses a manufacturing method of an array substrate. The manufacturing method comprises the steps that a pattern comprising a grid electrode, a grid line, a common electrode line and a grid insulating layer is formed on a substrate body; a pattern comprising a data line, a source electrode, a drain electrode and an active layer is formed; a pattern comprising an insulating spacer layer is formed on the pattern comprising the source electrode, the drain electrode and the active layer; a pattern comprising a first transparent electrode is formed on the insulating spacer layer; a pattern comprising a passivation layer is formed on the first transparent electrode; a pattern comprising a second transparent electrode is formed on the passivation layer. The invention further discloses the array substrate and a display device. The pollution to a TFT channel due to the ITO technology can be effectively avoided.
Owner:BOE TECH GRP CO LTD +1

Vitreous silica crucible manufacturing apparatus

A vitreous silica crucible manufacturing apparatus includes a plurality of carbon electrodes configured to heat and melt raw material powder by arc discharge, and a value of a ratio R2 / R1 of a diameter R2 of a front end of each of the carbon electrodes to a diameter R1 of a base end is set in a range of 0.6 to 0.8. Each carbon electrode has a diameter reduction portion formed at a front end position and reduced in diameter from a diameter R3 of a base end side to the diameter R2 of the front end. When a length of the diameter reduction portion is L1, the diameter of the front end is R2, the diameter of the base end is R1, an angle between the axis lines of the carbon electrodes is θ1, and X=(R1−R2) / 2, a value of L1−(X / tan(θ1 / 2)) is set in a range of 50 to 150 mm.
Owner:SUMCO CORP
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