36 results about "Smart Cut" patented technology

There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate, adhesion between a buried insulating layer as an under layer and a single crystal silicon layer is high, and it becomes possible to realize a semiconductor device with high reliability.

The invention provides a graphical silicon-on-insulator (SOI) substrate material and a preparation method thereof. The preparation method comprises the steps of 1) providing an SOI substrate comprising bottom silicon, a buried oxide layer and top silicon, and forming an insulating layer on the surface of the top silicon; 2) forming an etching window corresponding to a position for preparing a transistor channel; 3) etching the insulating layer to form a groove penetrating through the top silicon; 4) providing a silicon substrate, and bonding the silicon substrate and the insulating layer; 5) removing the bottom silicon; and 6) removing the buried oxide layer. The groove is formed in the insulating layer corresponding to the position for preparing the transistor channel, and the groove completely penetrates through the space between the top silicon and the bottom silicon, so that a hollowed area is formed below the transistor channel prepared later. In the substrate preparation process, annealing and peeling steps in a Smart-cut method are avoided while the quality of the material is guaranteed, so that the problem of breakage of the top silicon in the graphical area due to high stress is solved.

The present invention is a method for manufacturing a bonded wafer including at least the steps of: forming an ion-implanted layer inside a bond wafer; bringing the ion-implanted surface of the bond wafer into close contact with a surface of a base wafer directly or through a silicon oxide film; and performing heat treatment for delaminating the bond wafer at the ion-implanted layer, wherein the heat treatment step for delaminating includes performing a pre-annealing at a temperature of less than 500° C. and thereafter performing a delamination heat treatment at a temperature of 500° C. or more, and the pre-annealing is performed at least by a heat treatment at a first temperature and a subsequent heat treatment at a second temperature higher than the first temperature. As a result, there is provided a method for manufacturing a bonded wafer having high quality, for example, mainly the reduction of defects, by forming a high bonding strength state at a lower temperature than the temperature at which the delamination is caused, in the manufacture of the bonded wafer by the Smart Cut method (registered trademark).

The invention provides a method for preparing a semiconductor material through ion injection and fixed-point adsorption technologies. The method comprises the steps of firstly extending at least one period of an SixGe1-x / Si superlattice structure (x is greater than or equal to 0 and smaller than 1) on an Si substrate, sequentially growing an Si buffer layer and an SizGe1-z layer on the superlattice structure, then injecting H or He ions into the Si substrate and performing rapid annealing treatment, so as to ensure that the superlattice structure is adsorbed to the ions, and finally obtaining an SizGe1-z layer with low defect concentration and high relaxation. By bonding with the Si substrate with an oxidation layer, SGOI with low defect concentration and high relaxation can be prepared through smart cut, strained silicon with the thickness being smaller than the critical thickness is expanded on the obtained relaxation SizGe1-z layer, and strained silicon (sSOI) with high relaxation and low defect concentration on insulators can be prepared through smart cut. The method improves the stability of relaxation SiGe material prepared through ion injection through superlattice adion, obtains SiGe material with low defect concentration and high relaxation, reduces the technology difficulty, and is applicable to industrial production.

The invention relates to an intelligent cutting method and system for a solar battery piece, and the system is carried out according to the following steps: after the system is installed, coordinate correction needs to be carried out once. The correction method comprises the following steps: shooting a correction plate by using a camera to obtain coordinates of correction points on an image, calculating a coordinate correction comparison table by combining actual coordinates of the correction points, and storing the coordinate correction comparison table into a computer in a file form; when the system carries out cutting work, photographing a to-be-cut solar battery piece, obtaining the correction coordinates corresponding to the coordinates of the battery piece from the coordinate correction comparison table, reconstructing the corrected image, obtaining a cutting path according to the corrected image, and cutting the solar battery piece according to the cutting path. According to thesystem, the image of the solar battery piece captured by the camera is reconstructed, and the cutting path is obtained through the reconstructed image, so that errors caused by distortion of the shotimage are avoided, and the cutting precision is effectively improved.

The invention discloses a method for preparing a silicon carbide single crystal thin film. The technological process mainly includes: sample cleaning, wafer bonding, original thickness measurement, silicon carbide thinning, thickness monitoring, secondary thickness measurement, chemical mechanical polishing, sample Cleaning, thin film characterization and other processes. This method can obtain a silicon carbide single crystal film with a flat surface and a micron-scale thickness, and at the same time avoid the impact of defects that need to be implanted with high doses of hydrogen ions during the smart cut process, another common film preparation method. The prepared silicon carbide single crystal thin film is a heterogeneous material on a silicon substrate. Users can easily separate it from the substrate, or selectively retain part of the thin film substrate for subsequent use. In principle, silicon carbide thin film materials and other thin film materials that are difficult to grow heteroepitaxially or along a specific crystal direction can also be obtained from bulk samples by this method.

Embodiments of the present invention provide III-V-on-insulator (IIIVOI) platforms for semiconductor devices and methods for fabricating the same. According to one embodiment, compositionally-graded buffer layers of III-V alloy are grown on a silicon substrate, and a smart cut technique is used to cut and transfer one or more layers of III-V alloy to a silicon wafer having an insulator layer such as an oxide. One or more transferred layers of III-V alloy can be etched away to expose a desired transferred layer of III-V alloy, upon which a semi-insulating buffer layer and channel layer can be grown to yield IIIVOI platform on which semiconductor devices (e.g., planar and / or 3-dimensional FETs) can be fabricated.