48504 results about "Heat treated" patented technology

A shape-memory device manufactured from shape memory material includes multiple activation temperatures. The multiple activation temperatures arise from either the heat treatment of the device during manufacturing, or by combining different elements with different activation temperatures. To manufacture a shape-memory device with multiple activation temperatures, it is formed into a first shape. A first portion of the shape-memory device is heated to a first temperature, and a second portion of the shape-memory device is heated to a second temperature. The shape-memory device is then worked into a second shape. Accordingly, the first portion has a first transition temperature, and the second portion has a second transition temperature. In use, the shape-memory device is placed into a desired position. Energy is applied such that the first portion, second portion, or both portions are transformed.

The flavor and aroma characteristics of the smoke of a tobacco blend incorporating Oriental tobacco are improved by subjecting that blend to heat treatment. Oriental tobacco having a relatively high sucrose ester content is combined with a second dissimilar Oriental tobacco material and / or a non-Oriental tobacco material to form a tobacco mixture, and that mixture is heated for a time and under conditions sufficient to reduce the concentration of sucrose esters in the Oriental tobacco. Tobacco blends having reduced levels of sucrose esters yield smoke that does not possess undesirable off-notes provided by pyrolysis products of those sucrose esters; namely, 2-methylpropionic acid, 3-methylbutyric acid and 3-methylpentanoic acid.

A collapsible medical device and associated methods of occluding an abnormal opening in, for example, a body organ, wherein the medical device is shaped from plural layers of a heat-treatable metal fabric. Each of the fabric layers is formed from a plurality of metal strands and the assembly is heat-treated within a mold in order to substantially set a desired shape of the device. By incorporating plural layers in the thus-formed medical device, the ability of the device to rapidly occlude an abnormal opening in a body organ is significantly improved.

A method of forming a dielectric film includes: introducing a source gas essentially constituted by Si, N, H, and optionally C and having at least one bond selected from Si—N, Si—Si, and Si—H into a reaction chamber where a substrate is placed; depositing a silazane-based film essentially constituted by Si, N, H, and optionally C on the substrate by plasma reaction at −50° C. to 50° C., wherein the film is free of exposure of a solvent constituted essentially by C, H, and optionally O; and heat-treating the silazane-based film on the substrate in a heat-treating chamber while introducing an oxygen-supplying source into the heat-treating chamber to release C from the film and increase Si—O bonds in the film.

A composite, layered, integrated circuit formed by bonding of insulator layers on wafers provides for combination of otherwise incompatible technologies such as trench capacitor DRAM arrays and high performance, low power, low voltage silicon on insulator (SOI) switching transistors and short signal propagation paths between devices formed on respective wafer layers of a chip. In preferred embodiments, an SOI wafer is formed by hydrophilic bonding of a wafer over an integrated circuit device and then cleaving a layer of the second wafer away using implanted hydrogen and low temperature heat treatment. Further wafers of various structures and compositions may be bonded thereover and connections between circuit elements and connection pads in respective wafers made using short vias that provide fast signal propagation as well as providing more numerous connections than can be provided on chip edges.

Low dielectric constant films with improved elastic modulus. The method of making such coatings involves providing a porous network coating produced from a resin containing at least 2 Si-H groups and plasma curing the coating to convert the coating into porous silica. Plasma curing of the network coating yields a coating with improved modulus, but with a higher dielectric constant. The costing is plasma cured for between about 15 and about 120 seconds at a temperature less than or about 350° C. The plasma cured coating can optionally be annealed. Rapid thermal processing (RTP) of the plasma cured coating reduces the dielectric constant of the coating while maintaining an improved elastic modulus as compared to the plasma cured porous network coating. The annealing temperature is typically loss than or about 475° C., and the annealing time is typically no more than or about 180 seconds. The annealed, plasma cured coating has a dielectric constant in the range of from about 1.1 to about 2.4 and an improved elastic modulus.

A substrate heat treatment apparatus includes a heat-treating plate having a flat upper surface, support devices formed of a heat-resistant resin for contacting and supporting a substrate, a seal device disposed annularly for rendering gastight a space formed between the substrate and heat-treating plate, and exhaust bores for exhausting gas from the space. The support devices are formed of resin, and the upper surface of the heat-treating plate is made flat, whereby a reduced difference in the rate of heat transfer occurs between contact parts and non-contact parts on the surface of the substrate. Consequently, the substrate is heat-treated effectively while suppressing variations in heat history over the surface of the substrate.

Provided is a method of producing a light-emitting apparatus having a field effect transistor for driving an organic EL device, the field effect transistor including an oxide semiconductor containing at least one element selected from In and Zn, the method including the steps of: forming a field effect transistor on a substrate; forming an insulating layer; forming a lower electrode on the insulating layer; forming an organic layer for constituting an organic EL device on the lower electrode; forming an upper electrode on the organic layer; and after the step of forming the semiconductor layer of the field effect transistor and before the step of forming the organic layer, performing heat treatment such that an amount of a component that is desorbable as H2O from the field effect transistor during the step of forming the organic layer is less than 10−5 g / m2.

Embodiments of the invention provide a novel apparatus and methods for forming a conformal doped layer on the surface of a substrate. A substrate is provided to a process chamber, and a layer of dopant source material is deposited by plasma deposition, atomic layer deposition, or plasma-assisted atomic layer deposition. The substrate is then subjected to thermal processing to activate and diffuse dopants into the substrate surface.

A method for forming a conformal, homogeneous dielectric film includes: forming a conformal dielectric film in trenches and / or holes of a substrate by cyclic deposition using a gas containing a silicon and a carbon, nitrogen, halogen, hydrogen, and / or oxygen, in the absence of a porogen gas; and heat-treating the conformal dielectric film and continuing the heat-treatment beyond a point where substantially all unwanted carbons are removed from the film and further continuing the heat-treatment to render substantially homogeneous film properties of a portion of the film deposited on side walls of the trenches and / or holes and a portion of the film deposited on top and bottom surfaces of the trenches and / or holes.

The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.

Embodiments of the present invention are directed to methods and devices / systems for amplifying genetic material and may include providing a water-in-oil emulsion in a continuous flow. The emulsion may include a plurality of water droplets comprising microreactors. Each of the plurality of microreactors may include a single bead capable of capturing a nucleic acid template, a single species nucleic acid template and sufficient reagents to amplify the copy number of the nucleic acid template. The method also includes flowing the emulsion across a first temperature zone and a second lower temperature zone to thermally process the microreactors to amplify the nucleic acid template by polymerase chain reaction.

A method of forming a dielectric film includes: introducing a source gas essentially constituted by Si, N, H, and optionally C and having at least one bond selected from Si—N, Si—Si, and Si—H into a reaction chamber where a substrate is placed; depositing a silazane-based film essentially constituted by Si, N, H, and optionally C on the substrate by plasma reaction at −50° C. to 50° C., wherein the film is free of exposure of a solvent constituted essentially by C, H, and optionally O; and heat-treating the silazane-based film on the substrate in a heat-treating chamber while introducing an oxygen-supplying source into the heat-treating chamber to release C from the film and increase Si—O bonds in the film.

Methods and apparatuses to improve the temperature uniformity of a workpiece being processed on a heated platen of a thermal processing station. A heated platen is enclosed in a housing incorporating an additional heat source that uniformly outputs thermal energy into the process chamber in which the heated platen is positioned. In preferred embodiments, this heat source is positioned in the lid of the housing. It is additionally preferred that the heated lid includes features that provide a gas flow path to introduce to and / or purge gas from the process chamber. In terms of photoresist performance, the improved thermal uniformity provided by using such an additional heat source in the housing, e.g., in the lid, offers improved line width control and line uniformity across a wafer.

A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the wall thickness between 1.5 and 6.0 mm; the deflection displacement of 100 μm or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 μm at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps causing the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.

The present invention provides a wafer support tool for heat treatment easy in working and capable of realizing reduction in cost without generating damages or slip dislocations that would be otherwise caused by high temperature heat treatment and a heat treatment apparatus. The present invention is directed to a wafer support tool for heat treatment comprising: a plurality of wafer support members for supporting a wafer to be heat treated; and a support member holder for holding the wafer support members, wherein the wafer support members each has a contact portion with the wafer, at least one of the contact portions being movable relative to the support member holder.

A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the wall thickness between 1.5 and 6.0 mm; the deflection displacement of 100 μm or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 μm at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps causing the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.

An apparatus is provided for thermally processing substrates held in a carrier. The apparatus includes a cross-flow liner to improve gas flow uniformity across the surface of each substrate. The cross-flow liner of the present invention includes a longitudinal bulging section to accommodate a cross-flow injection system. The liner is patterned and sized so that it is conformal to the wafer carrier, and as a result, reduces the gap between the liner and the wafer carrier to reduce or eliminate vortices and stagnation in the gap areas between the wafer carrier and the liner inner wall.

Embodiments of the present invention pertain to substrate processing equipment and methods incorporating light emitting diodes (LEDs) for thermally processing substrates. Such light sources offer a variety of advantages including higher efficiency and more rapid response times. Pulse widths are selectable down to under a millisecond but can be for long pulses up to and exceeding a second. LEDs are preferable to tungsten-halogen lamps even in circumstances that allow longer processing times, since LEDs produce light with greater than 50% efficiency and tungsten-halogen lamps operate with less than 5% efficiency.

Disclosed is a heat treatment system for semiconductor devices. The heat treatment system is used in a heat treatment process for semiconductor devices, such as a crystallization process for an amorphous silicon thin film or a dopant activation process for a poly-crystalline silicon thin film formed on a surface of a glass substrate of a flat display panel including a liquid crystal display (LCD) or an organic light emitting device (OLED). The heat treatment system transfers a semiconductor device after uniformly preheating the semiconductor device in order to prevent deformation of the semiconductor device during the heat treatment process, rapidly performs the heat treatment process under the high temperature condition by heating the semiconductor device using a lamp heater and induction heat derived from induced electromotive force, and unloads the semiconductor device after uniformly cooling the semiconductor device such that the semiconductor device is prevented from being deformed when the heat treatment process has been finished. The heat treatment system rapidly performs the heat treatment process while preventing deformation of the semiconductor device by gradually heating or cooling the semiconductor device.

Disclosed are a semiconductor device and a manufacturing method thereof. According to the semiconductor device and the manufacturing method thereof according to exemplary embodiments of the present invention, after the dopant source layer is uniformly deposited on a channel layer of the device with the 3-demensional vertical structure by the plasma-enhanced atomic layer deposition (PEALD) method, the deposited dopant source layer is heat-treated so that the dopants are diffused into the channel layer to function as charge carriers, thereby preventing the charges in the channel layer from being reduced. According to the exemplary embodiments of the present invention, the diffusion speed and concentration of the dopant may be controlled by forming the barrier layer between the channel layer and the dopant source layer.

A thermal processing apparatus including: a cylindrical processing vessel; a support unit to be loaded into and unloaded from the vessel; and a heating furnace surrounding an outer periphery of the vessel, with a cooling space therebetween. The furnace is connected to a cooling-gas introduction unit, including a gas introduction passage to which a blowing fan is connected, for introducing a cooling gas into the cooling space during a temperature lowering operation after a thermal process. The furnace is connected to a cooling-gas discharge unit, including a heat exchanger, a suction fan, and a gas discharge passage, for discharging the cooling gas of a raised temperature from the cooling space. Connected to the gas discharge passage at a position upstream of the heat exchanger is a temperature-lowering gas introduction unit for introducing a temperature-lowering gas to the cooling gas of a raised temperature so as to lower its temperature.

Disclosed is a heat treatment unit 4 serving as a heat treatment apparatus, which includes a chamber 42 for containing a wafer W on which a low dielectric constant interlayer insulating film is formed, a formic acid supply device 44 for supplying gaseous formic acid into the chamber 42, and a heater 43 for heating the wafer W in the chamber 42 which is supplied with formic acid by the formic acid supply device 44.

A method for treating a hydrocarbon containing formation is described. The method for treating a hydrocarbon containing formation may include heating a first volume of the formation using a first set of heaters. A second volume of the formation may be heated using a second set of heaters. The first volume may be spaced apart from the second volume by a third volume of the formation. The first volume, second volume, and / or third volume may be sized, shaped, and / or located to inhibit deformation of subsurface equipment caused by geomechanical motion of the formation during heating.

Tantalum and titanium source reagents are described, including tantalum amide and tantalum silicon nitride precursors for the deposition of tantalum nitride material on a substrate by processes such as chemical vapor deposition, assisted chemical vapor deposition, ion implantation, molecular beam epitaxy and rapid thermal processing. The precursors may be employed to form diffusion barrier layers on microlectronic device structures enabling the use of copper metallization and ferroelectric thin films in device construction.