598 results about "Frequency scaling" patented technology

For producing a fingerprint of an audio signal, use is made of information defining a plurality of predetermined fingerprint modi, all of the fingerprint modi relating to the same type of fingerprint, the fingerprint modi, however, providing different fingerprints differing from each other with regard to their data volume, on the one hand, and to their characterizing strength for characterizing the audio signal, on the other hand, the fingerprint modi being pre-determined such that a fingerprint in accordance with a fingerprint modus having a first characterizing strength is convertible to a fingerprint in accordance with a fingerprint modus having a second characterizing strength, without using the audio signal. A predetermined fingerprint modus of the plurality of predetermined fingerprint modi is set and subsequently used for computing a fingerprint using the audio signal. The convertibility feature of the fingerprints having been produced by the different fingerprint modi enables setting a flexible compromise between the data volume and the characterizing strength for certain applications without having to re-generate a fingerprint database with each change of the fingerprint modus. Fingerprint representations scaled with regard to time or frequency may readily be converted to a different fingerprint modus.

An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

Dynamic voltage and frequency scaling (DVFS) is an effective way to reduce energy and power consumption in microprocessor units. Current implementations of DVFS suffer from inaccurate modeling of power requirements and usage, and from inaccurate characterization of the relationships between the applicable variables. A system and method is proposed that adjusts CPU frequency and voltage based on run-time calculations of the workload processing time, as well as a calculation of performance sensitivity with respect to CPU frequency. The system and method are processor independent, and can be applied to either an entire system as a unit, or individually to each process running on a system.