707 results about "Direct bonding" patented technology

A method for producing wafer splitting from ion implantation into silicon after low temperature direct bonding with surface roughness that is ˜1 nm (RMS). This result is an order of magnitude smoother than the previous work (˜10 nm RMS). The key improvement in this work is the use of a low temperature bond resulting in a strong bond before the material is cut. The smooth as-split surfaces produced using a low temperature bond are very important for creation of very thin (<50 nm) silicon-on-insulator (SOI), three-dimensional bonded structures and nanostructures that are split after processing.

A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.

A wafer temporary bonding method using silicon direct bonding (SDB) may include preparing a carrier wafer and a device wafer, adjusting roughness of a surface of the carrier wafer, and combining the carrier wafer and the device wafer using the SDB. Because the method uses SDB, instead of an adhesive layer, for a temporary bonding process, a module or process to generate and remove an adhesive is unnecessary. Also, a defect in a subsequent process, for example, a back-grinding process, due to irregularity of the adhesive may be prevented.

A method in which semiconductor-to-semiconductor direct wafer bonding is employed to provide a hybrid substrate having semiconductor layers of different crystallographic orientations that are separated by a conductive interface is provided. Also provided are the hybrid substrate produced by the method as well as using the direct bonding method to provide an integrated semiconductor structure in which various CMOS devices are built upon a surface orientation that enhances device performance.

The formation of through silicon vias (TSVs) in an integrated circuit (IC) die or wafer is described in which the TSV is formed in the integration process prior to metallization processing. TSVs may be fabricated with increased aspect ratio, extending deeper in a wafer substrate. The method generally reduces the risk of overly-thinning a wafer substrate in a wafer back-side grinding process typically used to expose and make electrical contacts to the TSVs. By providing deeper TSVs and bonding pads, individual wafers and dies may be bonded directly between the TSVs and bonding pads on an additional wafer.

A planar optical device is formed on a substrate. The device comprises an array of waveguide cores which guide optical radiation. A cladding layer is formed contiguously with the array of waveguide cores to confine the optical radiation to the array of waveguide cores. At least one of the array of waveguide cores and cladding layer is an inorganic-organic hybrid material that comprises an extended matrix containing silicon and oxygen atoms with at least a fraction of the silicon atoms being directly bonded to substituted or unsubstituted hydrocarbon moieties. This material can be designed with an index of refraction between 1.4 and 1.55 and can be deposited rapidly to thicknesses of up to 40 microns. In accordance with another embodiment of the invention, a method for forming a planar optical device obviates the need for a lithographic process. Illustratively, a method for forming an array of cores comprises the steps of: (1) preparing a waveguide core composition precursor material comprising at least one silane and a source of hydrocarbon moiety, (2) partially hydrolyzing and polymerizing the waveguide core precursor material to form a waveguide core composition, (3) using a mold, forming an array of waveguide cores comprising the waveguide core composition, and (4) completing hydrolysis and polymerization of the waveguide core composition under conditions effective to form an inorganic-organic hybrid material that comprises an extended matrix containing silicon and oxygen atoms with at least a fraction of the silicon atoms being directly bonded to substituted or unsubstituted hydrocarbon moieties. A cladding layer is then deposited over the array of waveguide cores. The use of the mold to pattern the array of waveguide cores obviates the need for a lithographic process.

Methods of bonding together semiconductor structures include annealing metal of a feature on a semiconductor structure prior to directly bonding the feature to a metal feature of another semiconductor structure to form a bonded metal structure, and annealing the bonded metal structure after the bonding process. The thermal budget of the first annealing process may be at least as high as a thermal budget of a later annealing process. Additional methods involve forming a void in a metal feature, and annealing the metal feature to expand the metal of the feature into the void. Bonded semiconductor structures and intermediate structures are formed using such methods.

A method for detachable bonding that forms an amorphous silicon layer, or a silicon oxide layer with a high hydrogen content, on an element such as a carrier substrate. A second element, such as a substrate, is bonded to the amorphous silicon layer or silicon oxide layer, and the second element may then have a portion removed. A third element, such as a host or carrier substrate, is bonded to the second element or to the remaining portion of the second element to form a bonded structure. The bonded structure is then heated to cause the first element to detach from the bonded structure.

Methods of directly bonding a first semiconductor structure to a second semiconductor structure include directly bonding at least one device structure of a first semiconductor structure to at least one device structure of a second semiconductor structure in a conductive material-to-conductive material direct bonding process. In some embodiments, at least one device structure of the first semiconductor structure may be caused to project a distance beyond an adjacent dielectric material on the first semiconductor structure prior to the bonding process. In some embodiments, one or more of the device structures may include a plurality of integral protrusions that extend from a base structure. Bonded semiconductor structures are fabricated using such methods.

A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.

A method for the direct bonding of a first wafer having an intrinsic curvature before bonding to a second wafer having an intrinsic curvature before bonding, at least one of the two wafers comprising at least one series of microcomponents. The method includes of bringing the two wafers into contact with each other so as to initiate the propagation of a bonding wave therebetween while imposing a predefined bonding curvature in the form of a paraboloid of revolution on one of the two wafers depending at least upon the intrinsic curvature before bonding of the wafer that includes the microcomponents, with the other wafer being free to conform to the predefined bonding curvature.

A method for providing encapsulation of an electronic device which obtains an encapsulating member configured to enclose the electronic device, prepares a surface of the encapsulating member for non-adhesive direct bonding, prepares a surface of a device carrier including the electronic device for non-adhesive direct bonding, and bonds the prepared surface of the encapsulating member to the prepared surface of the device carrier to form an encapsulation of the electronic device. As such, an encapsulated electronic device results which includes the device carrier having a first bonding region encompassing the electronic device, includes the encapsulating member having at least one relief preventing contact between the electronic device and the encapsulating member and having a second bonding region bonded to the first bonding region of the device carrier, and includes a non-adhesive direct bond formed between the first and second bonding regions thereby to form an encapsulation of the electronic device. The encapsulated electronic device can be an electronic or optoelectronic device.

A method for providing encapsulation of an electronic device which obtains an encapsulating member configured to enclose the electronic device, prepares a surface of the encapsulating member for non-adhesive direct bonding, prepares a surface of a device carrier including the electronic device for non-adhesive direct bonding, and bonds the prepared surface of the encapsulating member to the prepared surface of the device carrier to form an encapsulation of the electronic device. As such, an encapsulated electronic device results which includes the device carrier having a first bonding region encompassing the electronic device, includes the encapsulating member having at least one relief preventing contact between the electronic device and the encapsulating member and having a second bonding region bonded to the first bonding region of the device carrier, and includes a non-adhesive direct bond formed between the first and second bonding regions thereby to form an encapsulation of the electronic device. The encapsulated electronic device can be an electronic or optoelectronic device.