103results about How to "Suppress dark current" patented technology

In the present invention, a charge transfer unit is arranged on a first-plane side of a thinly-formed semiconductor base. Charge accumulating units are arranged on a second-plane side, the opposite side. A depletion prevention layer is arranged closer to the second-plane side than the charge accumulating units. The depletion prevention layer prevents a depletion region around the charge accumulating units from reaching the second plane of the semiconductor base. The depletion prevention layer can suppress surface dark current going into the charge accumulating units. Meanwhile, an energy ray incident from the second-plane side pass through the depletion prevention layer to generate signal charges in the charge accumulating units (depletion regions). The charge accumulating units collect, on a pixel-by-pixel basis, the signal charges which are to be transported to the charge transfer unit under voltage control or the like, and then are read to exterior as image signals.

In the present invention, a charge transfer unit is arranged on a first-plane side of a thinly-formed semiconductor base. Charge accumulating units are arranged on a second-plane side, the opposite side. A depletion prevention layer is arranged closer to the second-plane side than the charge accumulating units. The depletion prevention layer prevents a depletion region around the charge accumulating units from reaching the second plane of the semiconductor base. The depletion prevention layer can suppress surface dark current going into the charge accumulating units. Meanwhile, an energy ray incident from the second-plane side pass through the depletion prevention layer to generate signal charges in the charge accumulating units (depletion regions). The charge accumulating units collect, on a pixel-by-pixel basis, the signal charges which are to be transported to the charge transfer unit under voltage control or the like, and then are read to exterior as image signals.

A semiconductor imaging device, comprising: a photodetection region formed of a diffusion region of a first conductivity type and formed in an active region of a silicon substrate on a first side of a gate electrode so that its top is in contact with the silicon substrate and the inner edge portion invades under the channel region directly below the gate electrode; a shielding layer formed of a diffusion region of the second conductivity type and on the surface of the silicon substrate on the first side of the gate electrode, thereby The inner edge portion thereof is aligned with the side wall surface of the gate electrode on the first side; a floating diffusion region is formed in the active region on the second side of the gate electrode; and a channel region is formed on the second side of the gate electrode. directly below the gate electrode, wherein the channel region includes: a first channel region portion formed adjacent to the shielding layer; and a second channel region portion formed adjacent to the floating diffusion region, wherein the second The channel region portion contains impurity elements at a concentration level lower than that of the first channel region portion.

A pixel cell having a halogen-rich region localized between an oxide isolation region and a photosensor. The halogen-rich region prevents leakage from the isolation region into the photosensor, thereby suppressing dark current in imagers.

A dye-sensitized solar cell quasi solid electrolyte and a method for preparing a solar cell by using same are disclosed. The dye-sensitized solar cell quasi solid electrolyte comprises, by weight, 2-30% of alpha-cyanoacrylate, 0.1-10% of an inorganic additive, 5-20% of iodide, 0.5-5% of iodine, 10-50% of plasticizer, 0.5-10% of a photoanode compounding ingredient and 10-30% of an organic solvent.The quasi solid electrolyte of the invention has good heat stability, good mechanical properties, high conductivity, a fast gel speed and low costs. The electrolyte is easy to be prepared and to realize industrialization production. A liquid electrolyte is easy to leak, difficult for packaging and possesses other problems. The above problems can be radically solved by using the quasi solid electrolyte.

The invention discloses a dye-sensitized solar cell (DSSC) photo-anode. The DSSC photo-anode is of a five-layer overlapped structure, and comprises a conductive matrix, a first compact layer, a transmission layer, a second compact layer and a scattering layer in sequence. The DSSC photo-anode adopts the five-layer overlapped structure, the compact layer is arranged between the conductive matrix and the transmission layer, dark current formed between electron, produced on the conductive matrix, and electrolyte is effectively restrained, and further the purpose of improving the photoelectric conversion efficiency of a DSSC is achieved. The scattering layer is arranged at the position of a porous membrane, an optical path and secondary absorption of sunlight are increased through a light scattering function of large grains, and therefore the secondary utilization efficiency of light is increased, and the photoelectric conversion efficiency of the DSSC is improved by about 20%.

The invention provides an Si / TiOx heterojunction-based double-sided crystalline silicon solar cell, which comprises a front electrode, a TiOx layer, a crystalline silicon absorption layer, a p-type crystalline silicon heavily doped layer, a passivation layer and a metal gate electrode, wherein the structure of the Si / TiOx heterojunction-based double-sided crystalline silicon solar cell is the front electrode, the TiOx layer, the crystalline silicon absorption layer, the p-type crystalline silicon heavily doped layer, the passivation layer and the metal gate electrode in sequence from a light facing surface; and an n-type doped TiOx and crystalline silicon are utilized by the light facing surface to form a heterojunction while a traditional crystalline silicon preparation technology based on diffusion is utilized by a back surface. The TiOx can well passivate the surface of a silicon wafer, and the TiOx and silicon form a good heterojunction, so that improvement of the open-circuit voltage and the conversion efficiency of the heterojunction cell is facilitated. Existing crystalline silicon solar cell production equipment can be fully utilized by a traditional crystalline silicon preparation technology of the back surface. The sunlight can be fully utilized by the double-sided structure; the actual generating capacity is increased; and the photovoltaic power generation cost is reduced.

The invention relates to a novel self-filtering narrow spectral response organic light detector. The organic light detector sequentially comprises a substrate, a positive electrode, a P-type layer, anN-type layer and a negative electrode, the P-type layer can be further divided into a single-layer P-type layer structure and a multi-layer P-type layer structure, and in the single-layer P-type layer structure, the band gap of the P-type layer material is wider than that of the N-type layer material; in the multi-layer P-type layer structure, the band gap of at least one P-type layer material inthe P-type layer materials which are not in direct contact with the N-type layer is wider than that of the N-type layer material and / or the P-type layer material which is in direct contact with the N-type layer, and a buffer layer can be added between the positive electrode and the P-type layer and / or between the N-type layer and the negative electrode. According to the invention, a novel devicestructure and a simple preparation method are adopted, and the free selection of a detection spectrum waveband and the free adjustment of the half-peak width of a detection spectrum are achieved without a band-pass optical filter.

The invention provides a PNIN type InGaAs infrared detector and belongs to the optoelectronic material and device application field. The PNIN type InGaAs infrared detector is a PNIN type detector which sequentially comprises a substrate, a buffer layer, an extended wavelength InGaAs absorption layer, an n type insert layer and a cover layer; and the thickness of the n type insert layer ranges from 50nm to 150nm, and the components of the n type insert layer are the same with the components of the extended wavelength InGaAs absorption layer. The n type insert layer which is additionally arranged on the infrared detector can suppress the transport of carriers through generating band steps, so that dark current can be lowered, and thus the photoelectric performance of the infrared detector can be improved; and requirements for InGaAs material epitaxial growth can be lowered, so that the PNIN type InGaAs infrared detector can work in a wider wavelength range. The PNIN type InGaAs infrared detector of the invention is applicable to back light entering and flip-chip package structures, and has high universality.

The invention discloses a method for increasing the switch ratio of a graphene and nanowire heterojunction detector. The method includes the steps that an InAs nanowire is transferred on mechanically-stripped graphene in a physical mode, and a heterojunction is formed; due to the fact that the graphene and the InAs nanowire have different work functions, a schottky barrier is formed at the contact position; the grid voltage can adjust the Fermi level of the graphene, the height of the schottky barrier can be adjusted accordingly, a built-in electric field is formed, photoproduction electron and hole pairs are separated quickly, electrons flow to the InAs nanowire, and holes flow to the graphene. Accordingly, the dark current of the graphene and nanowire heterojunction detector can be restrained effectively through the controllable advantages of the schottky barrier, and the switch ratio of the detector is increased; by means of the structure, the switch ratio of the graphene and the nanowire heterojunction detector can exceed 10<2>. The method has very great significance in increasing the switch ratio of the existing graphene and the nanowire heterojunction detector.

The invention relates to a semiconductor device and a manufacturing method thereof. The characteristics lie in that the semiconductor device comprises a substrate, an insulating buffer layer and a barrier adjusting layer, and is characterized in that the substrate comprises trenches and a transmission region separated by the trenches; the insulating buffer layer is formed on the substrate and covers the surfaces of trenches and the transmission region; and the barrier adjusting layer is formed on the buffer layer and used for adjusting barriers at the surface of the substrate, the barrier adjusting layer comprises a first portion which is located on the buffer layer in each trench and a second portion which is located on the buffer layer in the transmission region, the first portion is formed by a conductive material, and the second portion is formed by an insulating material.

A solid-state imaging device and a camera are provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for element isolation regions other than the shallow trench element isolation region.

An imaging device includes a semiconductor substrate that includes a first impurity region having n-type conductivity; a photoelectric converter that is electrically connected to the first impurity region and that converts light into charges; a capacitor that includes a first terminal and a second terminal, the first terminal being electrically connected to the first impurity region; and a voltage supply circuit electrically connected to the second terminal. The voltage supply circuit is configured to generate a first voltage and a second voltage different from the first voltage. The first impurity region accumulates positive charges generated by the photoelectric converter.