32results about How to "Has radiation resistance" patented technology

The invention discloses a radio frequency silicon on insulator(SOI) laterally diffused metal oxide semiconductor (LDMOS) device provided with a low potential barrier body lead-out, which comprises a bottom layer silicon, a concealed oxide layer, a top layer silicon, a P-region, a N-region, a gate oxide layer, a polysilicon gate layer, a gate polycrystalline silicon carbide layer, a gate electrode, a side wall, a N-drift region, a drain region, a drain region silicate layer, a leakage electrode, a source region, a low potential barrier body lead-out region, a body region, a source region silicide layer, and a source electrode. In the invention, the radio frequency LDMOS device is manufactured on an SOI substrate, and a low potential barrier body lead-out is in a short circuit with the source region is formed by utilizing a heavily doped region homotypic with the P- region; the source / body, leakage / body as well as a gate is interconnected with each electrode by utilizing a silicide; a plurality of grate bars are in interdigital type parallel connection so as to enlarge the driving power of the device; and the invention provides a method for rectifying, back gate injection, N-regioninjection as well as N-drift region injection compatible with a complementary metal-oxide-semiconductor (CMOS) technology, as well as a N-drift region silicide conceal method compatible with the CMOStechnology.

The invention relates to a SRAM storage unit and a storage array. The SRAM storage unit includes: a first double-gate PMOS transistor, a second double-gate PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first pass transistor, a second pass transistor and a compensation unit. The invention can overcome the single event inversion effect of the SRAM storage unit.

The present invention relates to a SRAM (Static random access memory) cell and a memory array. The SRAM memory cell includes a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a second PMOS transistor, a first double-gate NMOS (N-channel metal oxide semiconductor) transistor, a second double-gate NMOS transistor, a first transmission transistor, a second transmission transistor and a compensation unit. The single event upset effect of the SRAM memory cell can be overcome.

The invention provides a three-dimensional positioning synchronization tracking camera system, comprising: a three-dimensional positioning synchronization tracking control board, a camera device, and a three-dimensional positioning synchronization tracking pan-tilt device; the three-dimensional positioning synchronization tracking control board and the camera device are both installed on the three-dimensional positioning synchronization tracking cloud further, the 3D positioning synchronous tracking pan / tilt head includes a rotating disk and a first driving component for driving the rotating disk to rotate, and the 3D positioning synchronous tracking control board and the camera device are both installed on the rotating disk through a motor bracket; the camera device The second drive assembly is rotatably mounted on the rotating disk. The three-dimensional positioning synchronous tracking camera system of the present invention has 360° continuous rotation in both the horizontal and vertical directions, variable rotation speed, high positioning accuracy, low delay, and also includes shock resistance and IP66 protection level and high stability. , the characteristics of low cost.

The invention discloses a metal hydroxide-boron nitride hybrid filler / rubber-combined cable insulating material for nuclear power plants and a preparation method thereof. The metal hydroxide grafted with methyl methacrylate and ionic liquid copolymer is loaded On the surface of boron nitride, it is blended with EVA / ethylene propylene rubber, crosslinking agent, compatibilizer, anti-aging agent, etc. in an appropriate proportion. Based on the modified filler, the invention constructs a radiation-proof and compatibilizing hetero At the same time, the radiation resistance of the ionic liquid is used to improve the radiation resistance of the material, and a nuclear power cable insulation material with flame retardancy, radiation resistance, good electrical performance, halogen-free, low smoke, and excellent mechanical properties is produced.

The invention relates to the field of a radio frequency power device, and discloses a radio frequency SOI LDMOS device with close body contact. The device comprises bottom layer silicon, an embedding oxidation layer, top layer silicon, a P<-> region an N<-> region, a gate oxidation layer, a polysilicon gate layer, a gate poly-silicide layer, a gate electrode, a silicon nitride side wall, an N<-> drift region, a drain region, a drain region silicide layer, a drain electrode, a source region, a body contact region, a body region, a source region silicide layer and a source electrode. The radio frequency LDMOS device is manufactured on an SOI substrate, and forms the close body contact which is in short circuit with the source region by utilizing a heavily doped region in the same form as the P<-> region; the source / body, a drain / body and the gate and the electrodes are interconnected by the silicide; a plurality of gate bars are connected in parallel in the forked mode so as to improve the driving capability of the device; a method for adjustment, back-gate injection, N<-> region injection and N<-> drift region injection, which is compatible with the CMOS process, is designed; and amethod for hiding the silicide in the N<-> drift region, which is compatible with the CMOS process, is designed.

The invention relates to the field of radio frequency power devices, and discloses a radio frequency SOI LDMOS device with H-shaped gate. The device comprises bottom layer silicon, an embedding oxide layer, top layer silicon, a P<-> region, an N<-> region, an H-shaped gate oxide layer, an H-shaped polysilicon gate layer, an H-shaped gate poly-silicide layer, a gate electrode, a silicon nitride side wall, an N<-> drift region, a drain region, a drain region silicide layer, a drain electrode, a source region, a body lead-out region, a source region silicide layer and a source electrode. The radio frequency LDMOS device is manufactured on an SOI substrate, and forms the body lead-out which is in short circuit with the source region by utilizing a heavily doped region in the same form as the P<-> region; the source / body, a drain / body and the gate and the corresponding electrodes are interconnected by the silicide; and a plurality of gate bars are connected in parallel in the forked mode so as to improve the driving capability of the device. Simultaneously, the invention discloses a method for adjustment, back-gate injection, N<-> region injection and N<-> drift region injection, whichis compatible with the CMOS process and a method for hiding the silicide in the N<-> drift region, which is compatible with the CMOS process.

The invention discloses a multi-gap transient magnetic field sensor. The sensor comprises a shell and a cable assembly arranged in the shell. The cable assembly comprises a closed annular coil definedby a flexible circuit board and a coaxial cable. The closed annular coil is arranged at one end of the shell, and the coaxial cable is electrically connected with the closed annular coil and is led out of the other end of the shell. The invention relates to the field of magnetic field sensors and provides a multi-gap transient magnetic field sensor, the problem of electric field signal interference can be overcome, the influence of an electric field on magnetic field measurement can be effectively reduced, meanwhile, a relatively high bandwidth can be obtained, and the sensor has a certain anti-radiation effect.

The invention relates to the technical field of integrated circuits, and relates to a SRAM storage unit reinforcement method based on a DICE structure and an SRAM storage array. The method includes: on the basis of the circuit design of the double interlocked memory cell DICE structure, adding an NMOS isolation tube between the NMOS transistors that can not share the source terminal and the drain terminal with the switching function, and the gate of the added NMOS isolation tube is added. Connect to GND. The problem of leakage current generated between adjacent NMOS transistors under the total dose of radiation in the existing layout technology is solved. The layout of sensitive MOS transistors in circuit design is crossed to increase the distance of sensitive nodes, thereby greatly reducing the probability of circuit flipping during single particle radiation. The effect of making the SRAM memory cells and arrays resistant to radiation without affecting the function is achieved.