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36results about How to "Increased junction" patented technology

Semiconductor device

InactiveUS20100224885A1Threshold voltage be improveImprove characteristicThyristorSolid-state devicesN channelSemiconductor
A semiconductor device having a junction FET having improved characteristics is provided. The semiconductor device has a junction FET as a main transistor and has a MISFET as a transistor for control. The junction FET has a first gate electrode, a first source electrode, and a first drain electrode. The MISFET has a second gate electrode, a second source electrode, and a second drain electrode. The MISFET is an n-channel type MISFET and has electric characteristics of an enhancement mode MISFET. The second gate electrode and the second drain electrode of the MISFET are connected to each other by short-circuiting. The first gate electrode of the junction FET and the second source electrode of the MISFET are connected to each other by short-circuiting.
Owner:RENESAS ELECTRONICS CORP

Method of manufacturing a bi-metal screw

The present invention pertains to a method of manufacturing a bi-metal screw comprising a sequence of procedures; wherein, the process preparation is for arranging a shank portion and a drilling portion made of different materials; the shank portion has a planar welding surface defined thereon; in particular, the drilling portion includes a conical section with a conical surface defined on the top face thereof. While operating, the conical section is gradually welded to the planar welding surface to form a composite screw, so as to smooth the air away for preventing the interspaces generated within the junction of the two portions and rendering the composite screw not to be slanted aside. Subsequently, an integral bi-metal screw is formed through the processes of precisely cutting and formation, thereby increasing the quality of the screw.
Owner:TOP WELL TECH CORP

Semiconductor device

A semiconductor device includes a normally-on junction FET having a gate electrode, a source electrode and a drain electrode and a normally-off MOSFET having a gate electrode, a source electrode and a drain electrode. The source electrode of the junction FET is electrically connected to the drain electrode of the MOSFET, and the junction FET is thus connected to the MOSFET in series. The gate electrode of the junction FET is electrically connected to the gate electrode of the MOSFET.
Owner:RENESAS ELECTRONICS CORP

Dietary supplement to promote gut health

Provided are dietary supplement composition comprising one or both of L-theanine and a trace mineral complex, optionally in combination with bioactive peptides, in an amount or amounts individually or in combination effective to promote gut health. Further optional components include a fiber oligosaccharide prebiotic, a polyphenol prebiotic, and a polynucleotide or blend. Examples of benefits include one or more of: —an increase in the amount of total short-chain fatty acid production or of at least one of propionate, acetate and butyrate; —an increase the expression or level of at least one tight junction protein (for example, claudin-1, claudin-3, claudin-4, occludin, or a zona occludens protein) or mucin-3 or decrease the expression or level of claudin-2; —an increase in transepithelial electrical resistance; —an increase in the abundance or diversity of a member or phylum of the intestinal bacterial community of the Intestinal lumen or mucus area (for example, Firmicutes, Bacteroidetes, Lactobacilli, Bifidobacteria, F. prausnitzii, or A. muciniphila); —an increase in the expression or level of at least one intestinal surface area marker protein (for example, villin, myosin, cadherin or sucrase-isomaltase). Methods for using such supplements are also disclosed.
Owner:TERRAGENICS NUTRITION INC
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