The invention discloses a SiC vertical
double diffusion metal oxide semiconductor structure (VDMOS) device with a composite
gate dielectric structure, and belongs to the technical field of power
semiconductor devices. A thought of differentiating modulation of electric fields is adopted according to difference of intensities of electric fields and difference of defect concentrations of gate dielectrics in different areas, namely, high-k gate dielectrics are adopted in channel regions with high-defect concentration and a low
electric field, so that a large quantity of trap states caused by using a SiO2 / SiC interface is avoided; the influence on Fowler-Nordheim (FN)
tunneling current is obviously reduced; and meanwhile, because the
electric field intensity in a channel injection area is small, the reduction on
gate dielectric breakdown voltage caused by small offset of
conduction band /
valence band is weakened; and moreover, a SiO2
gate dielectric (a junction field-effect
transistor (
JFET) area is formed in a way of extension and is not subjected to
ion injection, the surface quality of the
JFET area is good, and the SiO2 / SiC interface state is low) is adopted by the
JFET area with low defect concentration and a high
electric field, and enough high
conduction band offset is supplied by the SiO2
dielectric, so that the ahead breakdown of the gate
dielectric is avoided.