203results about "Electromagnetic wave demodulation" patented technology

An object is to provide a power storage device provided with a battery that is a power storage means, for safe and accurate supply of electric power in a short period of time for drive power supply voltage without checking remaining capacity of the battery or changing batteries with deterioration over time of the battery for drive power supply voltage. The power storage device is provided with a battery that is a power storage means as a power supply for supplying electric power and a counter circuit for counting charging time of the power storage means. An electromagnetic wave with electric field intensity, magnetic field intensity, and power flux density per unit time which are transmitted from a power feeder are controlled, and the power storage means is efficiently charged using the electromagnetic wave in a short period of time.

Mechanisms for performing sequential equivalence checking for asynchronous verification are provided. A first model of the integrated circuit design is provided that has additional logic in it to reflect the possible variance in behavior of the asynchronous crossings. A second model of the integrated circuit design is provided that does not have this asynchronous behavior logic but instead correlates to the simplest synchronous model that is usually used for non-asynchronous functional verification tasks. Sequential equivalence checking is performed to verify that the two models are input / output equivalent. In order to address non-uniform arrival times of bus strands, logic is provided for identifying bus strands that have transitioning bits, determining a representative delay for these strands, comparing the representative delays for all of the bus strands to determine the maximum delay for the entire bus, and applying this maximum delay to one of the models.

A spatial information detecting device using an intensity-modulated light is provided. This device comprises a photoelectric converter for receiving a light from a space into which a light intensity-modulated at a predetermined emission frequency is being irradiated, and generating an electrical output corresponding to an intensity of received light; a local oscillator circuit for outputting a local oscillator signal having a local oscillator frequency different from the emission frequency; a sensitivity controller for mixing the local oscillator signal with the electrical output to frequency convert the electrical output into a beat signal having a lower frequency than the emission frequency; an integrator for performing integration of said beat signal at a predetermined timing; and an analyzer for detecting information concerning the space according to an output of the integrator. According to this device, it is possible to accurately detect the spatial information without using a switching element having high-speed response at the light receiving side.

A phase detector in a delay locked loop circuit operates to determine the status of propagation of a first pulse of a reference clock signal (CKref) through a delay line (21). A first control signal (DOWN) is produced a in response to represent a first time at which the first pulse has progressed entirely through the delay line (21) and a later second time at which a next second pulse of the reference clock signal (CKref) arrives at a first input of the phase detector (24A). The delay of the delay line (21) is reduced in response to the first control signal (DOWN). A second control signal (UP) is produced in response to the status to represent a third time at which the second pulse of the reference clock signal (CKref) arrives at the first input of the phase detector (24A) and a later fourth time at which the first pulse of the reference clock signal (CKref) has progressed to the end of the delay line (21) and is used to increase the delay of the delay line (21).

A PLL and DLL are designed such that the power consumption is reduced, the size is reduced, the band width of the locked loop is increased, and the reliability is improved. There are provided a phase comparator for measuring the value of a feedback signal in synchronism with an input signal and outputting a phase signal representing the lead or lag of the phase of the feedback signal, a counter for increasing by one the number of bits representing “H” in a control signal when the phase signal represents the lead of the phase or decreasing by one the number of bits representing “H” in the control signal when the phase signal represents the lag of the phase, and a ring oscillator for increasing the oscillation period when the number of bits representing “H” in the control signal increases or decreasing the oscillation period when the number of bits representing “H” decreases.

A phase detector generates a first output signal if a feedback clock signal leads a reference clock signal by more than a first time. The phase detector generates a second output signal if the feedback clock signal lags the reference clock signal by more than a second time. If the feedback clock signal either leads the reference clock signal by less than the first time or lags the reference clock signal by less than the second time, neither output signal is generated. The phase detector may be used in a delay-lock loop in which the first and second output signals increase or decrease a delay of the reference clock signal by respective first and second delay increments. In such case, the each of the first and second delay increments should be less than the sum of the first and second times.