59 results about "Parallel computing architecture" patented technology

The invention discloses a lens boundary detection method which comprises the following steps of: 1) video frame character representation: calculating a non-uniform block histogram of each frame in the video in an HSV color space based on a general parallel calculation architecture as the characteristic representation of the video frame; 2) obtaining of similarity sequence, wherein the similarity of adjacent video frames is obtained by calculating the weight sum of the histogram distances of corresponding blocks, and the similarity sequence is a sequence consisting of the similarities of all adjacent video frames in the video; and 3) identification of lens boundary: for the detection of lens shear boundary, calculating the threshold by use of an adaptive threshold algorithm based on the similarity sequence, wherein the place with a similarity bigger than the threshold is the lens shear place. The detection of lens gradient boundary comprises the following steps of: finding the candidate gradient boundary by use of the inversion pair counting algorithm, and forming unified expression by use of Fourier function fitting; and comparing the candidate boundary with the standard gradient model to determine the gradient boundary and identity the gradient type thereof.

The invention provides a quick generating method for an integral imaging micro image array based on a GPU. The method comprises the process of establishing a virtual camera array to obtain a disparity image array in a Direct3D program and the process of achieving the operation that the disparity image array is quickly converted into a micro image array in a CUDA program. A simplified virtual camera array structure is established based on the computer graphics library Direct3D to carry out rendering on a virtual scene, and the efficiency of generating all the information of the micro image array is improved; the quick generation of the micro image array is completed based on the characteristics of a CUDA parallel computing architecture, data transmission in a CPU and a GPU is barely needed to be carried out through a computer system bus, and therefore the efficiency of generating the micro image array is further improved. Through the method, the speed of generating the integral imaging micro image array is increased by tens of times and even hundreds of times compared with the generation based on the CPU, and the requirements of real-time dynamic integral imaging 3D display are met.

A method and an apparatus that execute a parallel computing program in a programming language for a parallel computing architecture are described. The parallel computing program is stored in memory in a system with parallel processors. The system includes a host processor, a graphics processing unit (GPU) coupled to the host processor and a memory coupled to at least one of the host processor and the GPU. The parallel computing program is stored in the memory to allocate threads between the host processor and the GPU. The programming language includes an API to allow an application to make calls using the API to allocate execution of the threads between the host processor and the GPU. The programming language includes host function data tokens for host functions performed in the host processor and kernel function data tokens for compute kernel functions performed in one or more compute processors, e.g. GPUs or CPUs, separate from the host processor. Standard data tokens in the programming language schedule a plurality of threads for execution on a plurality of processors, such as CPUs or GPUs in parallel. Extended data tokens in the programming language implement executables for the plurality of threads according to the schedules from the standard data tokens.

The invention provides a rainfall sensor network node layout optimization method and device. The rainfall sensor network node layout optimization method and device can obtain high-precision rainfall space distribution through simulation by taking satellite remote sensing rainfall data as a background field and combining the ground monitoring data, so as to convert discretized ground monitoring data into high-precision and continuous ground data, and furthermore, can discretize the ground area through the Thiessen polygon, to reduce the number of traversing units, and improve the calculation efficiency. According to rainfall spatial distribution, the rainfall sensor network node layout optimization method and device can establish a multi-objective function and constraint conditions of nodelayout optimization to obtain a rainfall station layout optimization model, and can solve the model to obtain an optimal rainfall sensor network node layout by adopting a multi-objective microscopic neighborhood particle swarm algorithm, so as to provide a theoretical basis for reasonable layout of a ground monitoring station. In the solving process, the rainfall sensor network node layout optimization method and device transform the multi-target microscopic neighborhood particle swarm algorithm to be suitable for a parallel computing architecture, so as to accelerate the solving efficiency.

The invention discloses a method for structuring ultrasound long axis image quickly with high fidelity. The method is implemented by using a parallel computing architecture based on a graphics processor to perform efficient management to three-dimensional IVUS data with large data volume by quadtree data structure, performing recursion traverse to the quadtree and computing the intersecting point coordinate of the plane on which the long axis image is located and the quadtree data node, decomposing the long axis image into a series of small planes, then sending to the graphics processor for mapping and interpolation computing. The invention solves the problem that the data volume is too large to be loaded display memory of the graphics processor, improves utilization efficiency of texture cache of the graphics processor, and enhances computation speed and image quality by computing the three-dimensional spline interpolation by using single instruction multidata vector dot product of the graphics processor. The invention can achieve above 30 frame per second in structuring long axis image with high fidelity on common middle / high-grade display card for large scale IVUS image data of 512*512*4000*16bit.

The invention discloses a test method for achieving electromagnetic transient real-time simulation of an electrical power system based on CUDA parallel computing. An electromagnetic transient simulation test host computer adopts a CPU (central processing unit) and GPU (ground power unit) mode; the GPU uses a CUDA platform parallel computing framework; the simulation test host computer is connected with collection devices of all channels of signals through the gigabit Ethernet; a model can be greatly simplified mainly based on of the digital substation simulation instead of the whole-network or whole system simulation, the traditional simulation speed can be increased by dozens of times or hundreds of times, and requirements of transformer substation electromagnetic transient real-time simulation computing are met; and compared with the cost of a large parallel computer or a professional parallel computer, the cost of the CUDA parallel computing platform is greatly reduced. According to the method, in the aspect of electromagnetic transient real-time simulation of the electrical power system, the performance is greatly improved, the cost is substantially reduced, and the method has a wide popularization value.

The invention discloses a dynamic memory allocation method based on a GPU (Graphics Processing Unit), which comprises the following steps of: recording the size of a memory block and the position of a first available memory in a system through a set memory linked list management array so as to search a corresponding memory block which can be used for allocation; and then, according to the size of the memory needing to be allocated and the information of the memory blocks which can be used for allocation, setting parameters of the data structure of the memory blocks needing to be allocated so as to apply for the memory from the system and realize dynamic allocation of the memory. The new memory linked list structure provided by the invention has the characteristics of small occupied memory and the like, and meanwhile, the dynamic memory allocation method disclosed by the invention can be applied to internal allocation in a parallel computing architecture OpenGL of a GPU processor so as to adapt to parallel computing. The invention further discloses a dynamic memory allocation device based on the GPU and a storage medium.

The invention discloses a method utilizing a graphic processing unit (GPU) for achieving rapid wavelet transformation through segmentation. The method utilizing the GPU for achieving rapid wavelet transformation through segmentation mainly solves the problem that the speed of wavelet transformation in the prior art is low. Directing at the features of a parallel computing framework of the GPU, the method which segments data and conducts parallel processing to the data is designed. The method includes the following steps: copying an original image, segmenting the data, expanding the data, copying the data to a shared memory, transforming rows, transforming lines, canceling data expansion and copying the transformed data to a host machine memory. According to the method utilizing the GPU for achieving rapid wavelet transformation through segmentation, accuracy of a wavelet transformation result is guaranteed through the expansion of the segmented data, the visiting speed of the data is improved through the transformation in the shared memory, interaction between the data and a global memory is avoided, and the processing speed of the whole image is improved through the paralleling of image blocks and the paralleling among pixel points of image block branches.