72results about How to "Reduce metal pollution" patented technology

This invention relates to thermal spray composite coatings on a metal or non-metal substrate. The thermal spray composite coatings comprise (i) a ceramic composite coating undercoat layer having at least two ceramic material phases randomly and uniformly dispersed and / or spatially oriented throughout the ceramic composite coating, and (ii) a ceramic coating topcoat layer applied to the undercoat layer. At least a first ceramic material phase is present in the undercoat layer in an amount sufficient to provide corrosion resistance to the ceramic composite coating, and at least a second ceramic material phase is present in the undercoat layer in an amount sufficient to provide plasma erosion resistance to the ceramic composite coating. This invention also relates to methods of protecting metal and non-metal substrates by applying the thermal spray coatings. The composite coatings provide erosion and corrosion resistance at processing temperatures higher than conventional processing temperatures used in the semiconductor etch industry, e.g., greater than 100° C. The coatings are useful, for example, in the protection of semiconductor manufacturing equipment, e.g., integrated circuit, light emitting diode, display, and photovoltaic, internal chamber components, and electrostatic chuck manufacture.

This invention relates to substrate supports, e.g., coated electrostatic chucks, having a dielectric multilayer formed thereon; dielectric multilayers that provide erosive and corrosive barrier protection in harsh environments such as plasma treating vessels used in semiconductor device manufacture; process chambers, e.g., deposition chambers, for processing substrates; methods for protecting substrate supports; and methods for producing substrate supports and electronic devices. The dielectric multilayer comprises (a) an undercoat dielectric layer comprising a metal oxide or metal nitride formed on a surface; and (b) a topcoat dielectric layer comprising a metal oxide formed on the undercoat dielectric layer. The topcoat dielectric layer has an aluminum oxide content of less than about 1 weight percent. The topcoat dielectric layer has a corrosion resistance and / or plasma erosion resistance greater than the corrosion resistance and / or plasma erosion resistance of the undercoat dielectric layer. The undercoat dielectric layer can have a resistivity greater than the resistivity of the topcoat dielectric layer. The topcoat dielectric layer can have a dielectric constant greater than the dielectric constant of the undercoat dielectric layer. The undercoat dielectric layer can have a porosity greater than the porosity of the topcoat dielectric layer. The invention is useful, for example, in the manufacture and protection of electrostatic chucks used in semiconductor device manufacture.

The present invention provides a phase transition method of an amorphous material, comprising steps of: depositing the amorphous material on a dielectric substrate; forming a cap layer on the amorphous material; depositing a metal on the cap layer; and crystallizing the amorphous material. According to the present invention, the surface of the amorphous material is protected by the cap layer, so that clean surface can be obtained and the roughness of the surface can be remarkably reduced during thermal process and sample handling. In addition, the cap layer is disposed between the amorphous material and the metal to diffuse the metal, so that the metal contamination due to the direct contact of the metal and the amorphous material in the conventional method can be remarkably reduced.

The invention introduces a catalyst multi-section regeneration method and an apparatus, firstly, a spent catalyst enters a first section regenerator, and is in contact reaction with oxygen-containing gases in the first section regenerator, a second section regenerator and a third section regenerator sequentially, oxygen-containing regeneration flue gas of the first section enters the second section for continuous utilization, and the fresh compressed air is input to the third section for regeneration reaction, so as to complete the whole regenerative process. The fresh compressed air can also be supplemented to the first section regeneration reaction or the second section regeneration reaction, and the catalyst can also reflux to other sections for regeneration. The regeneration apparatus is composed of a first section turbulent bed regenerator, a second section turbulent bed regenerator and a third section turbulent bed regenerator in series connection, a distribution plate or a baffle and a catalyst standpipe are arranged, and all the regenerators are in coaxial arrangement. The invention adopts the multi-section counter-current regeneration, increases the average chemical kinetics speed, strengthens the regenerative process, saves the oxygen-containing gas usage, and reduces the production expense; and realizes the feeding of the spent catalyst from the bottom part or the middle part of each regenerator, lowers the height of the corresponding catalytic conversion device, shortens the oil-gas pipe-line, and reduces the construction investment.

A filled polymer composition having improved plasma resistance is disclosed. The composition includes a particle filler dispersed in a polymer matrix. The particle filler can be Nb2O5, YF3, AlN, SiC or Si3N4 and rare earth oxides. In an embodiment, the composition is utilized as a bonding adhesive for electrostatic chuck, bonding adhesive for shower head, bonding adhesive for liner, sealing material, O-ring, or plastic component.

The present invention provides a phase transition method of an amorphous material, comprising steps of: depositing the amorphous material on a dielectric substrate; forming a cap layer on the amorphous material; depositing a metal on the cap layer; and crystallizing the amorphous material. According to the present invention, the surface of the amorphous material is protected by the cap layer, so that clean surface can be obtained and the roughness of the surface can be remarkably reduced during thermal process and sample handling. In addition, the cap layer is disposed between the amorphous material and the metal to diffuse the metal, so that the metal contamination due to the direct contact of the metal and the amorphous material in the conventional method can be remarkably reduced.

Disclosed herein is a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor, and more specifically a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor wherein a phosphosilicate-spin-on-glass (P-SOG) is used for a gate insulating film. The method comprises the steps of: forming a buffer layer on an insulating substrate; forming a gate metal pattern on the buffer layer; forming a planarized gate insulating film on the gate metal pattern; depositing an amorphous silicon layer on the gate insulating film; crystallizing the amorphous silicon layer into a polycrystalline silicon layer; forming a n+ or p+ layer on the polycrystalline silicon layer; forming a source / drain metal layer on the n+ or p+ layer; and forming a passivation layer on the source / drain metal layer.

A process for producing a wafer, comprising at least the BMD formation step of subjecting a silicon single crystal having the form of an ingot to heat treatment to thereby form bulk microdefects (BMD) in the interior thereof, and the wafer machining step of machining the ingot furnished with the bulk microdefects (BMD) into a wafer. In this process for producing a wafer, the heat treatment for imparting IG capability in the wafer production can be shortened to thereby enable mass production of wafers of high IG capability. The process can further comprise the wafer heat treatment step of performing heat treatment of wafers after machining and the epitaxial growth step of forming an epitaxial layer on each of the wafers with the result that the productivity of, excelling in gettering effect, anneal wafers and epitaxial wafers can be enhanced.

A system for measuring gas density in a vacuum includes a gauge, a housing for containing the gauge, and a magnet secured to an exterior surface of the housing. The magnet is a flexible magnetic strips, and positioned around the exterior surface of the housing. The gauge includes grid insulator posts extending longitudinally along a tubular section of the housing, and the magnet is secured to the exterior surface of the housing adjacent to the grid insulator posts, and oriented transversely to the grid insulator posts. The magnet is a flexible magnetic strip, and a clamp secures the magnet to the exterior surface of the housing.

Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET: Of a polycrystalline silicon film, a WN film, a W film, and a cap insulating film formed on a gate insulating film on a p-type well (semiconductor substrate), the cap insulating film, the W film, and the WN film are etched and the over-etching of the polycrystalline silicon film below them is performed. Then, a sidewall film is formed on sidewalls of these films. Thereafter, after etching the polycrystalline silicon film with using the sidewall film as a mask, a thermal treatment is performed in an oxidation atmosphere, by which a light oxide film is formed on the sidewall of the polycrystalline silicon film. As a result, the contamination on the gate insulating film due to the W and the W oxide can be reduced, and also, the diffusion of these materials into the semiconductor substrate (p-type well) and the resultant increase of the leak current can be prevented.

A method of forming an opening on a low-k dielectric layer using a polysilicon hard mask rather than a metal hard mask as used in prior art. A polysilicon hard mask is formed over a low-k dielectric layer and a photoresist layer is formed over the polysilicon hard mask. The photoresist layer is patterned and the polysilicon hard mask is etched with a gas plasma to create exposed portions of the low-k dielectric layer. The photoresist layer in stripped prior to the etching of the exposed portions of the low-k dielectric layer to avoid damage to the low-k dielectric layer.

Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap insulating film formed on a gate insulating film on a p-type well (semiconductor substrate), the cap insulating film, the W film, and the WN film are etched and the over-etching of the polycrystalline silicon film below them is performed. Then, a sidewall film is formed on sidewalls of these films. Thereafter, after etching the polycrystalline silicon film with using the sidewall film as a mask, a thermal treatment is performed in an oxidation atmosphere, by which a light oxide film is formed on the sidewall of the polycrystalline silicon film. As a result, the contamination on the gate insulating film due to the W and the W oxide can be reduced, and also, the diffusion of these materials into the semiconductor substrate (p-type well) and the resultant increase of the leak current can be prevented.