5793results about How to "Performance is not affected" patented technology

A power saving cache and a method of operating a power saving cache. The power saving cache includes circuitry to dynamically reduce the logical size of the cache in order to save power. Preferably, a method is used to determine optimal cache size for balancing power and performance, using a variety of combinable hardware and software techniques. Also, in a preferred embodiment, steps are used for maintaining coherency during cache resizing, including the handling of modified (“dirty”) data in the cache, and steps are provided for partitioning a cache in one of several way to provide an appropriate configuration and granularity when resizing.

The present invention provides a data processing apparatus and method for managing access to a memory within the data processing apparatus. The data processing apparatus comprises a processor operable in a plurality of modes and a plurality of domains, said plurality of domains comprising a secure domain and a non-secure domain, said plurality of modes including at least one non-secure mode being a mode in the non-secure domain and at least one secure mode being a mode in the secure domain, said processor being operable such that when executing a program in a secure mode said program has access to secure data which is not accessible when said processor is operating in a non-secure mode. Further, a memory is provided for storing data required by the processor, and consists of secure memory for storing secure data and non-secure memory for storing non-secure data. The memory further contains a non-secure table and a secure table, the non-secure table being within the non-secure memory and arranged to contain for each of a number of first memory regions an associated descriptor, and the secure table being within the secure memory and arranged to contain for each of a number of second memory regions an associated descriptor. When access to an item of data in the memory is required by the processor, the processor issues a memory access request, and a memory management unit is provided to perform one or more predetermined access control functions to control issuance of the memory access request to the memory. The memory management unit comprises an internal storage unit operable to store descriptors retrieved by the memory management unit from either the non-secure table or the secure table, and in accordance with the present invention the internal storage unit comprises a flag associated with each descriptor stored within the internal storage unit to identify whether that descriptor is from the non-secure table or the secure table. By this approach, when the processor is operating in a non-secure mode, the memory management unit is operable to perform the predetermined access control functions for the memory access request with reference to access control information derived from the descriptors in the internal storage unit retrieved from the non-secure table. In contrast, when the processor is operating in a secure mode, the memory management unit is operable to perform the predetermined access control functions for the memory access request with reference to access control information derived from the descriptors in the internal storage unit retrieved from the secure table. This approach enables different descriptors to be used for the control of accesses to memory in either the secure domain or the non-secure domain, whilst enabling such different descriptors to co-exist within the memory management unit's internal storage unit, thereby avoiding the requirement to flush the contents of such an internal storage unit when the operation of the processor changes from the secure domain to the non-secure domain, or vice versa.

The invention discloses an automatic assembling device for valve rod sealing rings. The automatic assembling device comprises an automatic valve rod feeding device and two sets of automatic sealing ring assembling devices, wherein the automatic valve rod feeding device sequentially moves valve rods to positions to be assembled for realizing the automatic feeding of the valve rods; after the automatic valve rod feeding device positions the valve rods and tightly presses the valve rods, the automatic feeding and ring supporting actions of O-shaped sealing rings are respectively completed by the two sets of automatic sealing ring assembling devices, in addition, the supported O-shaped sealing rings are pushed into grooves of the valve rods in the two positions to be assembled of the valve rods, and the automatic assembly of the two sealing rings is completed; finally, the assembled valve rods are conveyed and discharged. The automatic assembling device has the advantages that the assembly automation of the valve rod sealing rings can be realized, the defects of low assembly speed and automation assembly adaption difficulty of manual operation can be overcome, the product qualification rate and the assembly efficiency are greatly improved, and in addition, the work intensity, the labor and the production cost are reduced. The invention also discloses an automatic assembling method for the valve rod sealing rings.

A method and system for Extensible Markup Language (XML) schema validation, includes: loading an XML document into a runtime validation engine, where the runtime validation engine includes an XML schema validation parser; loading an annotated automaton encoding (AAE) for an XML schema definition into the XML schema validation parser; and validating the XML document against the XML schema definition by the XML schema validation parser utilizing the annotated automaton encoding. Each XML schema definition is compiled once into the AAE format, rather than being compiled each time an XML document is validated, and thus significant time is saved. The code for the runtime validation engine is fixed and does not vary depending on the XML schema definition, rather than varying for each XML schema definition, and thus space overhead is minimized. Flexibility in the validation process is provided without compromising performance.

A system and a method to avoid packet traffic congestion in a shared memory switch core, while dramatically reducing the amount of shared memory in the switch core and the associated egress buffers and handling unicast as well as multicast traffic. According to the invention, the virtual output queuing (VOQ) of all ingress adapters of a packet switch fabric are collapsed into its central switch core to allow an efficient flow control. The transmission of data packets from an ingress buffer to the switch core is subject to a mechanism of request / acknowledgment. Therefore, a packet is transmitted from a virtual output queue to the memory shared switch core only if the switch core can send it to the corresponding egress buffer. A token based mechanism allows the switch core to determine the egress buffer's level of occupation. Therefore, since the switch core knows the states of the input and output adapters, it is able to optimize packet switching and to avoid packet congestion. Furthermore, since a packet is admitted in the switch core only if it can be transmitted to the corresponding egress buffer, the shared memory is reduced.

The invention relates to an adaptive method of and intelligent wristband. Whether the intelligent wristband is in an off state or a worn state is judged according to operation data, heart rate data and blood oxygen saturation data; when the intelligent wristband is in the off state, an operation sensing module and a control unit are switched into a power saving mode, and power of other modules except for the operation sensing module and the control unit is switched off; when the intelligent wristband is in the worn state, an operation sensing module, a heart rate sensing module and a blood oxygen saturation sensing module are switched into a normal operating mode, respectively detect the operation data, the heart rate data and the blood oxygen saturation data, and store the data to a storage unit. Thus, adaptiveness of the off state and the worn state of the intelligent wristband is realized, operation is facilitated and simple, frequent operations during usage of the intelligent wristband are avoided, user experience is improved, battery power is saved, and service life of the intelligent wristband is prolonged.

The invention discloses a preparation method of a super-retarding type polycarboxylate superplasticizer. The super-retarding type polycarboxylate superplasticizer comprises a copolymer and water serving as a solvent, wherein the copolymer comprises an unsaturated polyether macromonomer, an unsaturated carboxylic acid / anhydride mini-monomer, an unsaturated sulfonic acid mini-monomer and an unsaturated phosphonic acid mini-monomer; the pH is 6-7. According to the preparation method, a phosphonate structure capable of retarding is introduced into a water reducer molecular structure; the prepared super-retarding type polycarboxylate superplasticizer can be directly applied to the concrete which needs a relatively long setting time, and thus the process of compounding a retarder can be saved, the production efficiency can be improved, the obtained product is uniform and stable, and abnormal concrete setting time can be avoided.

The invention relates to a preparation method of lithium titanate-graphene combination electrode material, belonging to the field of electrochemical power source; in the invention, the lithium titanate and graphite oxide are mixed and are prepared into titanate-graphene combination electrode material by heating under inert atmosphere; in the synthesized lithium titanate-graphene combination electrode material, metallic lithium is used as the cathode for preparing a battery, and the first charging and discharging capacity exceeds 186mAh / g when 10C charging and discharging is carried out; after 100 circles of the charging and discharging are carried out, the discharging capacity is higher than 116mAh / g. the method in the invention has low cost, and simple and flexible preparation procedures, and is suitable for industrial large-scale production. High multiplying power of the prepared titanate-graphene combination electrode material has good performance, and the combination electrode material has high specific capacity and can be widely applied to lithium ion batteries of various kinds of potable electronic equipment and various electric motors.

A system and method autonomously and precisely track objects moving along a known course. The objects include, for example, racing horses, other racing animals, or racing vehicles. The system and method utilize modern satellite navigation satellite systems, signal processing, radio communications systems and computer processing to acquire and analyze performance data of the moving objects during competitions and during training and practice. The data acquisition is performed continuously at a rate of at least 1 Hz during the competition, training or practice even in the presence of objects which affect the quality of the signals received from the satellite system.