73results about How to "Improve epitaxy quality" patented technology

A light emitting diode (LED) structure includes a substrate with a surface and cylindrical photonic crystals, a first type doping semiconductor layer, a first electrode, a light emitting layer, a second type doping semiconductor layer and a second electrode. The first type doping semiconductor layer is formed on the substrate to cover the photonic crystals. The light emitting layer, the second type doping semiconductor layer and the second electrode are sequentially formed on a portion of the first type doping semiconductor layer. The first electrode is formed on the other portion of the first type doping semiconductor layer without being covered by the light emitting layer. Because the substrate with photonic crystals can improve the epitaxial quality of the first type doping semiconductor layer and increase the energy of the light forwardly emitting out of the LED, the light emitting efficiency of the LED is effectively enhanced.

The invention discloses an inverted mounting LED chip based on double-faced shrinkage pool substrate and component gradual change buffer layer, wherein the chip comprises a sapphire substrate distributed with 102-104 shrinkage pools at upper and lower surfaces, an AlxGa1-xN component gradual change buffer layer composed of an unit layer formed by k non-doping AlxGa1-xN epitaxial materials, a n-type GaN epitaxial layer, an InGaN / GaN multi-quantum well, a p-type GaN layer, a transparent ITO (indium tin oxide) conductive film, an inverted mounting welding electrode and a silicon substrate from upper to lower. The LED chip disclosed by the invention uses the shrinkage pool structure for improving the emergent probability of LED emergent lights, and increasing the heat radiation area and growth stress acting range of the substrate, so that the GaB epitaxial quality and the radiation composite luminous efficiency are improved; the buffer layer of the n-type GaN epitaxial layer is manufactured by the AlxGa1-xN with gradually reduced Al component, so that the light-emitting efficiency and the internal quantum efficiency of the LED are improved, and a relatively high light output power is obtained.

The present invention relates to a patterned opto-electrical substrate, comprising a substrate, the substrate has a first patterned structure, a spacer region and a second patterned structure, wherein the second patterned structure is formed on one or both of the first patterned structure and the spacer region, and the first patterned structure is a micron-scale protruding structure or a micron-scale recessing structure, while the second patterned structure is a submicron-scale recessing structure. The present invention also relates to a method for manufacturing the aforementioned patterned opto-electrical substrate and light emitting diodes having the aforementioned patterned opto-electrical substrate.

The invention discloses a polishing method for a lithium tantalate substrate. The method includes the steps of 1, grinding a cut tantalate lithium wafer with an abrasive material with the particle size of 5-20 microns, and obtaining a lithium tantalate grinding sheet with the surface of a rough structure; 2, directly conducting chemical corrosion on the lithium tantalate grinding sheet in a sealed container filled with the mixed acid of nitric acid and hydrofluoric acid, wherein the roughness of the tantalate lithium wafer is smaller than 200 nm, and the flatness is smaller than 5 microns; obtaining a lithium tantalate corrosion sheet with the surface of a random disordered pit structure; 3, conducting single-side polishing on the lithium tantalate corrosion sheet with a single-polishing machine and a polishing liquid, wherein the polishing pressure is 0.005-1 MPa, the roughness of the tantalate lithium wafer is smaller than 0.5 nm, and the flatness is smaller than 3 microns; obtaining a lithium tantalite polishing sheet. The polishing method has the advantages of one-time polishing, batch production and high polishing efficiency, and the produced lithium tantalate substrate has high surface flatness which determines that the lithium tantalate substrate is not easily broken in the application of devices; the material utilization is high, and the processing yield is high.

A method is described herein for the providing of high quality graphene layers on silicon carbide wafers in a thermal process. With two wafers facing each other in close proximity, in a first vacuum heating stage, while maintained at a vacuum of around 10−6 Torr, the wafer temperature is raised to about 1500° C., whereby silicon evaporates from the wafer leaving a carbon rich surface, the evaporated silicon trapped in the gap between the wafers, such that the higher vapor pressure of silicon above each of the wafers suppresses further silicon evaporation. As the temperature of the wafers is raised to about 1530° C. or more, the carbon atoms self assemble themselves into graphene.

The invention relates to the field of semiconductor materials and discloses a sapphire substrate and a polishing method and an application thereof. The surface of the sapphire substrate is polished, and the polished surface has random sunken patterns. The surface of the sapphire substrate is partially planarized. Therefore the processing cost for the sapphire substrate is greatly reduced and the polishing efficiency is increased.

The invention discloses a light-emitting diode device and a method for manufacturing the same. An undoped semiconductor layer and a current blocking structure of the light-emitting diode device are disposed on a substrate in sequence. Light-emitting structures of the light-emitting diode device are separately disposed on the current blocking structure. Each of the light-emitting structures has a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer arranged on the first conductivity type semiconductor layer in sequence, and a first electrode and a second electrode, respectively located on the other part of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. The first conductivity type semiconductor layer and the second conductivity type semiconductor layer have different conductivity types. Insulating spacers of the light-emitting diode device are respectively located between the adjacent light-emitting structures. Conductive wires of the light-emitting diode device respectively connect the first electrode of one of the adjacent light-emitting structures and the second electrode of the other light-emitting structure in sequence.

The invention discloses a method for preparing a high-quality ZnO monocrystal film on a sapphire substrate, which is the method for preparing the high-quality ZnO monocrystal film on the sapphire substrate by a surface, interface and buffer layer combined growth method and comprises the following concrete steps of: carrying out ultrahigh vacuum heat processing combined with oxygen plasma preprocessing on the surface of the sapphire (0001) substrate; then depositing a BeO buffer layer to supply an ideal template for the epitaxial growth of ZnO, and then preparing the high-quality ZnO film by a publicly known two-step growth method. The ZnO monocrystal film prepared according to the method has very good crystallization performance and is applicable for the manufacture of high-performance photoelectronic devices such as an ultraviolet detector and the like.

The invention provides an epitaxial growth method which is a single wafer processing epitaxial growth method by which at least a single crystal substrate is placed in a reaction chamber with an upper wall having a downward convexity and an epitaxial layer is deposited on the single crystal substrate by introducing raw material gas and carrier gas into the reaction chamber through a gas feed port, in which, after any one of the radius of curvature of the upper wall of the reaction chamber and a difference between an upper end of the gas feed port and a lower end of the upper wall of the reaction chamber in the height direction or both are adjusted in accordance with the flow rate of the carrier gas which is introduced into the reaction chamber through the gas feed port, an epitaxial layer is deposited on the single crystal substrate. As a result, a single wafer processing epitaxial growth method is provided that can obtain the effects, such as an increase in the quality of an epitaxial wafer and an increase in productivity, which are produced by the degree of the flow rate of carrier gas, and deposit an epitaxial layer on a single crystal substrate without deforming the film thickness shape.

Ternary nitride-based buffer layer of a nitride-based light-emitting device and related manufacturing method. The device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a ternary nitride-based buffer layer, a first conductivity type nitride-based semiconductor layer, a light-emitting layer, and a second conductivity type nitride-based semiconductor layer. The manufacturing method includes introducing a first reaction source containing a first group III element into a chamber at a first temperature that is subsequently deposited on the surface of the substrate, the melting point of said element being lower than the first temperature. Introducing a second reaction source containing a second group III element and a third reaction source containing a nitrogen element into the chamber at a second temperature, no lower than the melting point of the first group III element, for forming a ternary nitride-based buffer layer with the first group III element.

The invention relates to a graphical silicon carbide (SiC) substrate. The surface of the graphical SiC substrate comprises periodized protrusions or concave images which are formed by means of plasma etching or wet etching, wherein the periodized protrusions or the concave images are any one of multilateral cones, multilateral cylinders, multi-rowed frustums, trapezoid multilateral frustums, trapezoid round pedestals, hemispheres or spherical crowns. Periodic images are combination of any two or more than two of the multilateral cones, the multilateral cylinders, the multi-rowed frustums, the trapezoid multilateral frustums, the trapezoid round pedestals, the hemispheres or the spherical crowns. The graphical SiC substrate can improve epitaxy quality of heteroepitaxy of gallium nitride (GaN) and homoepitaxy of 3C-SiC which take SiC as the substrate, and improves performance and stability of elements prepared by epitaxial wafers.

The invention discloses a high-quality silicon carbide epitaxial growth technology. A plurality of silicon carbide buffer layers are sequentially homogeneously grown on a silicon carbide substrate bya chemical vapor deposition process, and a silicon carbide epitaxial layer is grown on the uppermost buffer layer, wherein the growth rate of all the buffer layers increases stepwise from bottom to top, and the growth rate of the top buffer layer is not higher than the growth rate of the epitaxial layer. Multiple buffer layers are formed through the stepped control of the growth rate, and a plurality of interfaces formed by the brief growth interruption among the buffer layers sequentially reduce the propagation of defects, so the extended propagation of the defects of the substrate to the epitaxial layer is blocked, the number of the defects in the epitaxial layer is reduced, the epitaxial quality is improved, and the characteristics and the yield of functional devices manufactured basedon above obtained epitaxial wafers are improved.

The invention discloses a patterned substrate of pattern improved LED chip. The pattern of the substrate is composed of a plurality of regular triangular pyramids with the same shape which are arranged on the surface of the substrate, and the inclination angle alpha of the regular triangular pyramids is 60 DEG to 65 DEG. The space D of the adjacent regular triangular pyramids is 1 to 1.4 times the length A of the side of the regular triangular pyramids. The invention further discloses a LED chip containing the patterned substrate of pattern improved LED chip. Compared with the prior art, the LED chip containing the patterned substrate of pattern improved LED chip has better extraction efficiency than a LED chip with a common substrate, and is convenient in popularization and application. According to the patterned substrate of pattern improved LED chip and LED chip containing the same, the regular triangular pyramids graph accords with the crystal lattice structure of GaN, and the target pattern can be easily obtained in practical processing.

The invention relates to a semiconductor photoelectric structure for improving light extraction efficiency and a manufacturing method thereof. The semiconductor photoelectric structure comprises a substrate and a buffer layer positioned on the substrate, wherein the buffer layer is provided with a continuous hole pattern between the buffer layer and the substrate; a semiconductor layer is positioned on the buffer layer, and comprises an n-type conduction layer positioned on the buffer layer, a light emitting layer positioned on the n-type conduction layer, a p-type conduction layer positioned on the light emitting layer, a transparent electrically-conductive layer positioned on the semiconductor layer, a p-type electrode positioned on the transparent electrically-conductive layer, and an n-type electrode positioned on the n-type conduction layer. Continuous holes are formed below the light emitting layer to reflect the light emitted by the light emitting layer, so that the light intensity and luminance of a light emitting surface are improved. In addition, the defect density of an epitaxy can be reduced, and the quality of the epitaxy can be improved.