750results about How to "Improve internal quantum efficiency" patented technology

Provided is a semiconductor opto-electronic device that may comprise an active layer including a quantum well and a barrier layer on a substrate, upper and lower waveguide layers on and underneath the active layer, respectively, and upper and lower clad layers on and underneath the upper and lower waveguide layers, respectively. The semiconductor opto-electronic device may further comprise an upper optical confinement layer (OCL) between the active layer and the upper waveguide layer and having an energy gap smaller than the energy gap of the upper waveguide layer and equal to or larger than the energy gap of the barrier layer, and a lower OCL between the active layer and the lower waveguide layer and having an energy gap smaller than the energy gap of the lower waveguide layer and equal to or smaller than the energy gap of the barrier layer. Also provided is a method of fabricating the semiconductor opto-electronic device.

An n-cap layer is formed on a top surface of p-type clad layers, the p-type clad layer is a top layer of a stacked structure having a pn-junction for emitting carriers into light-emitting region of a GaN based light-emitting device, thus increasing the activation ratio of acceptor impurities in the p-type clad layers. The n-cap layer is used also as a current blocking layer, thereby constructing a current-blocked structure. The n-cap layer should preferably be made of InuAlvGa1-u-vN (0<u, v<1) deposited as thick as 1.0 micron or more. The present invention will easily provide a high luminous efficiency GaN based semiconductor light-emitting device without using any complicated processes such as electron-beam irradiation or thermal annealing.

A strain balanced active-region design is disclosed for optoelectronic devices such as light-emitting diodes (LEDs) and laser diodes (LDs) for better device performance. Lying below the active-region, a lattice-constant tailored strain-balancing layer provides lattice template for the active-region, enabling balanced strain within the active-region for the purposes of 1) growing thick, multiple-layer active-region with reduced defects, or 2) engineering polarization fields within the active-region for enhanced performance. The strain-balancing layer in general enlarges active-region design and growth windows. In some embodiments of the present invention, the strain-balancing layer is made of quaternary In_xAl_yGa_1-x-yN (0≦x≦1, 0≦y≦1, x+y≦1), whose lattice-constant is tailored to exert opposite strains in adjoining layers within the active-region. A relaxation-enhancement layer can be provided beneath the strain-balancing layer for enhancing the relaxation of the strain-balancing layer.

It is an object of the present invention to provide an organometallic complex which can increase recombination efficiency of electrons and holes. One aspect of the present invention is an organometallic complex having a structure represented by a general formula (1), wherein each of R¹ and R² is any of a halogen group, a —CF₃ group, a cyano group, and an alkoxycarbonyl group, each of R³ and R⁴ is any of hydrogen and an alkyl group having 1 to 4 carbon atoms, and M is an element that belongs to Group 9 or 10 of the periodic table.

The invention discloses an epitaxial structure and a growing method for improving gallium nitride (GaN) based light-emitting diode (LED) lighting efficiency. The order of the epitaxial structure from bottom to up is that a substrate, a low-temperature GaN buffer layer, a GaN non-doping layer, a N-shaped GaN layer, a multiple quantum well (MQW) structure, a multiple quantum well active layer, a low-temperature P-shaped GaN layer, a P-shaped aluminum (AL) GaN layer, a high-temperature P-shaped GaN layer and a P-shaped contact layer, wherein the order of the multiple quantum well active layer from bottom to up comprises a InyGa1-yN potential well layer, a InN layer and a barrier layer in sequence. The growing method of the multiple quantum well active layer structure is that by inserting the InN layer and a low-temperature annealing step in the growing process of a InyGa1 potential well layer and a GaN barrier layer, so that the composition of In quantum dot in the barrier layer is advanced and crystalline quality of the quantum well is improved, therefore, gallium nitride based LED lighting efficiency is improved.

A gallium nitride (GaN) based light emitting device, wherein the device comprises a first surface and a second surface, and the first surface and second surface are separated by a thickness of less than 100 micrometers, and preferably less than 20 micrometers. The first surface may be roughened or textured. A silver or silver alloy may be deposited on the second surface. The second surface of the device may be bonded to a permanent substrate.

An organic electroluminescence cell including at least one organic layer and a pair of electrodes, the organic layer including a light-emitting layer and sandwiched between the pair of electrodes, the pair of electrodes including a reflective electrode and a transparent electrode, the organic electroluminescence cell formed to satisfy the expression: B₀<B_θ in which B₀ is a frontal luminance value of luminescence radiated from a light extraction surface to an observer, and B_θ is a luminance value of the luminescence at an angle of from 50° to 70°, wherein a reflection/refraction angle disturbance region is provided so that the angle of reflection/refraction of the luminescence is disturbed while the luminescence is output from the light-emitting layer to the observer side through the transparent electrode.

A method for manufacturing green-emitting phosphor particles including the steps of producing a powder containing europium and strontium from a solution containing a europium compound and a strontium compound, mixing the resulting powder and a powdered gallium compound, and performing firing.

The invention relates to a dual-layer perovskite light emitting diode and a preparation method therefor. The dual-layer perovskite light emitting diode comprises the following components from the bottom up separately: ITO conductive glass is used as a positive electrode; a layer of poly 3, 4-ethylenedioxythiophene-polystyrolsulfon acid (PEDOT-PSS) with a thickness of about 20nm is used as a hole transport layer; a dual-layer perovskite light emitting layer is prepared by a spin-coating method in two times; the adopted dual-layer perovskite light emitting layer can be perovskite with different halogen ratios; a layer of calcium-doped zinc oxide (Ca:ZnO) with the thickness of about 50nm is spin-coated on the perovskite layer to be used as an electron transport layer; and finally metal calcium and aluminum are evaporated to be used as a negative electrode. According to the dual-layer perovskite light emitting diode and the preparation method therefor, on one hand, by regulating and controlling the Ca concentration in the Ca:ZnO, an optimal band gap is obtained, so that the barrier between the electron transport layer and the perovskite is reduced, and the cut-in voltage of the light emitting diode is lowered consequently, and the light emitting efficiency and internal quantum efficiency of the light emitting diode are improved at the same time; and on the other hand, by regulating the halogen ratios in the perovskite, light emission with different colors can be realized.

A light-emitting device 100 has ITO transparent electrode layers 8, 10 used for applying drive voltage for light-emission to a light-emitting layer section 24, and is designed so as to extract light from the light-emitting layer section 24 through the ITO transparent electrode layers 8, 10. The light-emitting device 100 also has contact layers composed of In-containing GaAs, formed between the light-emitting layer section 24 and the ITO transparent electrode layers 8, 10, so as to contact with the ITO transparent electrode layers respectively. The contact layers 7, 9 are formed by annealing a stack 13 obtained by forming GaAs layers 7′, 9′ on the light-emitting layer section, and by forming the ITO transparent electrode layers 8, 10 so as to contact with the GaAs layers 7′, 9′, to thereby allow In to diffuse from the ITO transparent electrode layers 8, 10 into the GaAs layers 7′, 9′. This provides a method of fabricating a light-emitting device, in which the ITO transparent electrode layers as the light-emission drive electrodes are bonded as being underlain by the contact layers, to thereby reduce contact resistance of these electrodes, and to thereby make the contact layers less susceptible to difference in the lattice constants with those of the light-emitting layer section during the formation thereof.

The invention discloses a nitride light-emitting diode (LED) structure. An indium gallium nitrogen (InGaN) layer with gradually varied indium (In) content is inserted between an N-type electron injection layer and a multi-quantum well active layer so as to release a stress between the multi-quantum well active layer and the N-type electron injection layer and improve the internal quantum efficiency and the luminous intensity of a device. The invention also discloses a preparation method for the nitride LED structure. In the method, the InGaN layer with gradually varied In content is inserted between the N-type electron injection layer and the multi-quantum well active layer so as to release the stress between the multi-quantum well active layer and the N-type electron injection layer and improve the internal quantum efficiency and the luminous intensity of the device.

Disclosed are a light emitting device. The light emitting device includes a first conductive semiconductor layer, a light emitting layer, a protective layer, a nano-layer and a second conductive semiconductor layer. The light emitting layer is formed on the first conductive semiconductor layer. The protective layer is formed on the light emitting layer. The nano-layer is formed on the protective layer. The second conductive semiconductor layer is formed on the nano-layer.

The invention discloses a nitride LED (light-emitting diode) structure. A P-type doped InGaN/GaN superlattice structure is inserted between a multiple quantum well active layer and an electronic barrier layer so as to improve the hole concentration and reduce the dosage concentration of the P-type hole injection layer; the superlattice structure has polarization effect, thus being capable of improving the doping efficiency and reducing the P-type impurity concentration; and impurity atoms are prevented from being diffused to the potential well, and the inner quantum efficiency and the luminous efficiency of the device can be improved. The invention also discloses a preparation method of the nitride LED structure, through inserting the P-type doped InGaN/GaN superlattice structure between the multiple quantum well active layer and the electronic barrier layer, the hole concentration can be improved, and the dosage concentration of the P-type hole injection layer can be reduced; since the superlattice structure has polarization effect, the doping efficiency can be improved and the P-type impurity concentration can be reduced; and the impurity atoms are prevented from being diffused to the potential well, and the inner quantum efficiency and the luminous efficiency of the device can be improved.

A light emitting device has a nanostructured layer with nanovoids. The nanostructured layer can be provided below and adjacent to active region or on a substrate or a template below an n-type layer for the active region, so as to reduce strain between epitaxial layers in the light emitting device. A method of manufacturing the same is provided.

An optoelectronic device includes at least first and second light-emitting nanowires on a support, each comprising an area for the injection of holes and an area for the injection of electrons, a series electric connection including a connection nanowire on the support, which includes a first region forming an electric path with the hole injection area of the first nanowire, a second region forming an electric path with the electron injection area of the second nanowire, and a third region enabling a current to flow between first and second regions. Also included are a first conductive area connecting the hole injection area of the first nanowire and the first region of the connection nanowire and electrically insulated from the second nanowire, and a second conductive area connecting the second region of the connection nanowire and electron injection area of the second nanowire and electrically insulated from the first nanowire.

The invention provides a blue LED epitaxial structure with a suppression polarization effect barrier layer, and relates to the technical field of light emitting diodes. The blue LED epitaxial structure comprises a substrate, an AlN buffer layer, a U-type GaN layer, an N-type GaN layer, a shallow quantum well layer, an active region, an electron blocking layer, and a P-type GaN layer in sequence from bottom to top, the suppression polarization effect barrier layer is inserted between the shallow quantum well layer and the active region, and the suppression polarization effect barrier layer comprises an AlxGal-xN layer and a SiN layer from bottom to top. According to the blue LED epitaxial structure, a novel barrier layer is inserted into the conventional epitaxial structure, the stress is released, polarization is suppressed, the defect density is reduced, the radiative recombination probability is improved, the polarization effect is reduced, and the quantum efficiency in the LED is improved.

A Group III nitride based light emitting diode includes a p-type Group III nitride based semiconductor layer, an n-type Group III nitride based semiconductor layer that forms a P-N junction with the p-type Group III nitride based semiconductor layer, and a Group III nitride based active region on the n-type Group III nitride based semiconductor layer. The active region includes a plurality of sequentially stacked Group III nitride based wells including respective well layers. The plurality of well layers includes a first well layer having a first thickness and a second well layer having a second thickness. The second well layer is between the P-N junction and the first well layer, and the second thickness is greater than the first thickness.