171 results about "Overlay" patented technology

A system and method for data storage in an array. A system includes a client coupled to a storage subsystem including data storage locations addressable as rows and columns in an array. Each column comprises a separate storage device. Each row includes redundant data. For a given row, a coordinating storage device coordinates the computation and storage of redundant data. The system detects a failure of a storage region and in response, configures an overlay storage device to temporarily overlay the failed region, maintains an association between the overlay device and the failed region, and maintains a record of changes made to the overlay device while the region is in a failed state. In response to detecting that the failed region has been restored, the system uses the association to identify the overlay device and uses the record of changes made to the overlay device to resynchronize the failed region.

A modified JAVA(™) execution environment is described. The modified environment supports multiple JAVA(™) applications on a single JAVA(™) virtual machine (JVM). This modified environment provides significant memory and performance improvements when running multiple applications on a single computer system. Notably, no changes are needed to the source code of an application to take advantage of the modified environment. Further, embodiments of the invention may support shared access to base classes through the use of overlays. Additionally, system resource permissions can be enforced based upon the user permissions associated with a running application. Notably, embodiments of the invention allow multiple applications to share the abstract window toolkit (AWT) on a per display basis. Since only a single garbage collection routine is necessary, applications see improved performance relative to running in different JVMs. Further, the shared base classes eliminate significant memory overhead.

A method and system for constructing a single topic-connected overlay network are disclosed. A link contribution array, which stores sets of edges in an order according contribution values, is provided. A highest contribution index indicates a highest element in the link contribution array. The method includes performing, at every iteration, a Greedy Merge (GM) algorithm for selecting an edge from the highest element in the link contribution array, removing the selected edge from the link contribution array, and adding the selected edge to a set of overlay edges. After the selected edge is added to the set of overlay edges, contribution values of other edges are updated. The GM algorithm terminates when all elements in the link contribution array become empty. As an output, the GM algorithm generates a single topic-connected overlay network for all topics. A Greedy Join (GJ) and Greedy Leave (GL) functions are also disclosed.

Apparatus, method and computer program product for reducing overlay errors during a semiconductor photolithographic mask design process flow. The method obtains data representing density characteristics of a photo mask layout design; predicts stress induced displacements based on said obtained density characteristics data; and corrects the mask layout design data by specifying shift movement of individual photo mask design shapes to pre-compensate for predicted displacements. To obtain data representing density characteristics, the method merges pieces of data that are combined to make a photo mask to obtain a full reticle field data set. The merge includes a merge of data representing density characteristic driven stress effects. The density characteristics data for the merged reticle data are then computed. To predict stress-induced displacements, the method inputs said density characteristics data into a programmed model that predicts displacements as a function of density, and outputs the predicted shift data.

The present invention relates to a graphical user interface. A system and method for providing a graphical representation of a computer device and display overlay is disclosed. A computer device is represented in a graphical representation. The computer device comprises at least two modules. An overlay comprising at least one attribute corresponding to each of the modules is positioned such that the attributes are spatially associated with the modules corresponding thereto.

In calibration of overlay performance of an immersion lithographic apparatus, two sets of overlay data are obtained from exposures carried out using, for example, normal and reversed meanders. The two data sets can then be used to eliminate effects due to substrate cooling.

A method for setting one or more breakpoints within executable program code of an embedded device is described. The method comprises copying at least one area of non-volatile memory (NVM) of the embedded device, comprising at least one instruction at which a breakpoint is to be set, into at least one area of overlay memory replacing within the overlay memory the at least one instruction at which a breakpoint is to be set with a breakpoint operation code, and enabling a mapping of the at least one area of NVM, comprising the at least one instruction at which a breakpoint is to be set, to the at least one area of overlay memory during execution of the program code within the embedded device.

A computer implemented method (referred to herein as “compensated screenshot”) for overlaying a graphical image in a computing device, the method comprising the steps of: a) providing a semi-transparent overlay window having an alpha-transparency value α in the range from 1% to 99%, and comprising a first bitmap; b) taking a screenshot, thereby obtaining a second bitmap; c) calculating a third bitmap so as to compensate the effect of the graphical overlay, based on said first bitmap and said second bitmap and said alpha-transparency value α; d) optionally storing the third bitmap in a non-volatile memory or a storage device; e) optionally copying the third bitmap to a clipboard of the operating system.

The invention discloses an overlay deviation value correction method, electronic equipment and a computer readable storage medium. The method comprises the following steps of providing a wafer comprising a plurality of exposure areas, selecting a plurality of exposure areas, and determining a plurality of to-be-detected overlay identifiers from the selected exposure areas, calculating the image ofeach to-be-detected overlay identifier for multiple times to obtain a plurality of overlay deviation measurement values, calculating an average value and a standard deviation of the overlay deviationmeasurement value, and taking the average value and the standard deviation as an overlay deviation value and a measurement error value respectively, setting a weight in negative correlation with eachmeasurement error value according to the measurement error value, and performing weighted assignment correction on each overlay deviation value by utilizing each measurement error value and the set weight. According to the method, the average value and the standard deviation of the overlay deviation measurement value serve as the overlay deviation value and the measurement error value respectively, the overlay deviation is corrected based on the measurement error value, the influence of the measurement error is fully considered when the overlay correction parameter is calculated, and the overlay correction accuracy is improved.

Techniques and mechanisms described herein include a signal processor implemented as an overlay on a field-programmable gate array (FPGA) device that utilizes special purpose, hardened intellectual property (IP) modules such as memory blocks and digital signal processing (DSP) cores. A Processing Element (PE) is built from one or more DSP cores connected to additional logic. Interconnected as an array, the PEs may operate in a computational model such as Single Instruction-Multiple Thread (SIMT). A software hierarchy is described that transforms the SIMT array into an effective signal processor.

Process control methods, metrology targets and production systems are provided for reducing or eliminating process overlay errors. Metrology targets have pair(s) of periodic structures with different segmentations, e.g., no segmentation in one periodic structure and device-like segmentation in the other periodic structure of the pair. Process control methods derive metrology measurements from the periodic structures at the previous layer directly following the production thereof, and prior to production of the periodic structures at the current layer, and use the derived measurements to adjust lithography stage(s) that is part of production of the current layer. Production system integrate lithography tool(s) and metrology tool(s) into a production feedback loop that enables layer-by-layer process adjustments.