39results about "Resist details" patented technology

The method for producing a wired circuit board including an insulating layer and a conductive pattern provided on the insulating layer includes the steps of the following: a step (1), in which the insulating layer is provided; a step (2), in which a metal thin film is provided on an inclined face of the insulating layer; a step (3), in which a photoresist is provided on the metal thin film; a step (4), in which a photomask is disposed so that in the photoresist, a portion where the conductive pattern is to be provided is shielded from light, and the photoresist is exposed to light through the photomask; a step (5), in which the portion of the photoresist shielded from light by the photomask is removed to expose the metal thin film corresponding to the portion; and a step (6), in which the conductive pattern is provided on the metal thin film exposed from the photoresist. When exposing the photoresist, reflection is caused by the metal thin film positioned on the inclined face to reduce light projected to the portion.

A method for manufacturing a flexible circuit board is provided. The method for manufacturing a flexible circuit board includes the following steps: providing a carrier substrate, forming a flexible substrate on the carrier substrate, and forming a plurality of circuit strings on the flexible substrate. A flexible circuit board manufactured by the above method is also provided.

A light emitting diode load board includes a substrate, a first dielectric layer, a second dielectric layer and a first conductive pad and a second conductive pad. The second dielectric layer includes a first structure part, a second structure part and a third structure part. The first dielectric layer is disposed on the substrate. The first structure part is disposed on the first dielectric layer and has a first sidewall. The second structure part is disposed on the first structure part and has a second sidewall. The third structure part is disposed on the second structure part and has N sidewalls. The second sidewall is more prominent than the first sidewall. The first sidewall, the second sidewall and the N sidewalls define the first etched part, and the part of the first dielectric layer is exposed from the first etched part. The first conductive pad is disposed in the first etched part. The second conductive is disposed on the second dielectric layer, covers part of the second dielectric and exposes the open of the first etched part.

The invention provides etching-resistant jet ink and provides a method for preparing a conductive circuit by using the etching-resistant jet ink. The etching-resistant jet ink comprises a photocuring monomer, an oligomer, a pigment and a photoinitiator, wherein the photocuring monomer comprises at least one of monofunctional (methyl) acrylate, bidirectional (methyl) acrylate and tri-functional acrylate; the bidirectional (methyl) acrylate comprises at least one of bidirectional (methyl) acrylate with a glycol structure or propylene glycol structure in the molecular structure. The etching-resistant jet ink is good in flowability, applicable to jet ink technique and good in stable jet printing property, a temporary protecting layer formed after the jet ink is cured can meet the process requirements of the circuit board in the production process and is resistant to corrosion of an etching liquid without dropping, and rapid stripping can be achieved in an alkali liquid after the etching process is completed.

A liquid solder resist composition contains a carboxyl group-containing resin, a photopolymerizable compound containing at least one compound selected from a group consisting of a photopolymerizable monomer and a photopolymerizable prepolymer, a photopolymerization initiator, a titanium dioxide, and a compound having a cyclic ether skeleton. The titanium dioxide contains both of a rutile titanium dioxide manufactured by a sulfuric acid method and a rutile titanium dioxide manufactured by a chlorine method.

A manufacturing method of a circuit board and a piezochromic stamp are provided. A circuit pattern is formed on a dielectric substrate. A dielectric layer having a hole or a conductive via and covering the circuit pattern is formed on the dielectric substrate. A conductive seed layer is formed on the dielectric layer. A photoresist layer is formed on the conductive seed layer. A piezochromic stamp is imprinted on the photoresist layer, wherein when the pressing side of the piezochromic stamp is in contact with the conductive seed layer, the light transmittance effect thereof is changed to blocking or allowing light having a specific wavelength to pass through. A patterned photoresist layer is formed by using the piezochromic stamp as a mask. A patterned metal layer is formed on the exposed conductive seed layer. The patterned photoresist layer and the conductive seed layer are removed.

A solution is characteristic in being an etching method that processes a surface of a target object by corroding the surface by a corrosive, and the etching method includes: a resist forming step of forming a resist on the surface using resist liquid by ink jet printing the resist liquid on the surface; a surface corroding step of corroding a portion of the surface where the resist is not formed by bringing the corrosive into contact with a surface side of the target object where the resist has been formed in the resist forming step; and a resist detaching step of detaching the resist from the surface after the surface corroding step, wherein the resist forming step is a step of forming the resist by the resist liquid containing monofunctional monomers or monofunctional oligomers, and polyfunctional monomers or polyfunctional oligomers.

The invention discloses a time control method and system for organic solderability preservatives (OSP) surface processing on a printed circuit board (PCB). The method comprises the steps of performing identification on each PCB, and marking each PCB; recording time of each PCB entering each processing station; and comparing recorded time with preset time, and taking corresponding measure according to a comparison result. The system comprises a scanning module, a control module, a warning module and a display module, wherein an output end of the scanning module is connected with an input end of the control module, and an output end of the control module is connected with the warning module and the display module. Compared with the prior art, the processing time of the PCB is strictly controlled, the quality of the PCB leaving from a factory is ensured, the return rate is greatly reduced, manual control is omitted, and the production cost is reduced.

A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.

A method of forming a fine electrode, including: forming a base part on a substrate; disposing a transparent electrode solution at a boundary portion between a circumferential surface of the base part and an upper surface of the substrate; forming a transparent electrode by partially removing the transparent electrode solution; and removing the base part from the substrate.

A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.

Disclosed is a production method of a multi-layered printed wiring board, including the following steps 1 to 3:Step 1: a step of laminating, on a substrate with inner layer circuit, a metal foil with adhesive layer including a support, a metal foil having a thickness of 3 μm or less and ⅙ or less relative to the thickness of the inner layer circuit, and an organic adhesive layer having a thickness of 10 μm or less in this order, via an organic insulating resin layer such that the organic insulating resin layer and the organic adhesive layer are opposed to each other, and then releasing the support to form a laminated sheet (a) having the metal foil as an outer layer metal foil layer;Step 2: a step of irradiating the laminated sheet (a) with a laser to bore the outer layer metal foil layer, the organic adhesive layer, and the organic insulating resin layer to form a bored laminated sheet (b) having a blind via hole; andStep 3: a step of forming an outer layer circuit connected with the inner layer circuit through the following steps 3-1 to 3-4:Step 3-1: a step of etching removing the outer layer metal foil layer of the bored laminated sheet (b) formed in the step 2 and then forming an outer layer copper layer having a thickness of 2 μm or less on the bored laminated sheet (b);Step 3-2: a step of forming a resist pattern by a resist applied on the outer layer copper layer;Step 3-3: a step of forming a circuit layer on the surface of the outer layer copper layer on which the resist pattern is not formed, by electrolytic copper plating; andStep 3-4: a step of removing the resist pattern and then removing the exposed outer layer copper layer by etching, thereby forming an outer layer circuit connected with the inner layer circuit.

A method includes the following steps: S1, providing the insulating layer having an inclined face; S4, disposing a photomask so that in the photoresist, first and second exposure portions are exposed to light, and exposing the photoresist is to light through the photomask; S5, removing the first and the second exposure portions of the photoresist. On the assumption that in S4, light reflected at the metal thin film is focused between the first and the second exposure portions of the photoresist, the inclined face has a bending portion bending in one direction, the portion removed in S5 in the photoresist due to light focus being continuous with the first and the second exposure portions. The second exposure portion includes continuously an avoidance portion that avoids the bending portion and an overlapping portion that overlaps with at least a portion other than the bending portion in the inclined face.