11357 results about "Semiconductor components" patented technology

A three dimensional monolithic memory comprising a memory cell allowing for increased density is disclosed. In the memory cell of the present invention, a bottom conductor preferably comprising tungsten is formed. Above the bottom conductor a semiconductor element preferably comprises two diode portions and an antifuse. Above the semiconductor element are additional conductors and semiconductor elements in multiple stones of memories. The arrangement of processing steps and the choice of materials decreases aspect ratio of each memory cell, improving the reliability of gap fill and preventing etch undercut.

A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and / or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.

In a multi-layer interconnection structure, the wiring length is to be reduced, and the interconnection is to be straightened, at the same time as measures need to be taken against radiation noise. To this end, there is disclosed a semiconductor device in which plural semiconductor substrates, each carrying semiconductor elements, are bonded together. On each semiconductor substrate is deposited an insulating layer through which is formed a connection wiring passed through the insulating layer so as to be connected to the interconnection layer of the semiconductor element. On a junction surface of at least one of the semiconductor substrates is formed an electrically conductive layer of an electrically conductive material in which an opening is bored in association with the connection wiring. The semiconductor substrates are bonded together by the solid state bonding technique to interconnect the connection wirings formed on each semiconductor substrate.

A structure for a semiconductor components is provided having a device layer sandwiched on both sides by other active, passive, and interconnecting components. A wafer-level layer transfer process is used to create this planar (2D) IC structure with added functional enhancements.

A light emitting diode comprising an LED chip having a light emitting layer made of a nitride compound semiconductor and a light transmitting resin that includes a fluorescent material which absorbs at least a part of light emitted by the LED chip and emits light of a different wavelength, wherein the fluorescent material includes a fluorescent particles of small particle size and a fluorescent particles of large particle size, the fluorescent particles of large particle size being distributed in the vicinity of the LED chip in the light transmitting resin to form a wavelength converting layer, the fluorescent particles of small particle size being distributed on the outside of the wavelength converting layer in the light transmitting resin.

Provided are methods and devices for transfer printing of semiconductor elements to a receiving surface. In an aspect, the printing is by conformal contact between an elastomeric stamp inked with the semiconductor elements and a receiving surface, and during stamp removal, a shear offset is applied between the stamp and the receiving surface. The shear-offset printing process achieves high printing transfer yields with good placement accuracy. Process parameter selection during transfer printing, including time varying stamp-backing pressure application and vertical displacement, yields substantially constant delamination rates with attendant transfer printing improvement.

A carrier for a semiconductor component is provided having passive components integrated in its substrate. The passive components include decoupling components, such as capacitors and resistors. A set of connections is integrated to provide a close electrical proximity to the supported components.

A microelectronic unit is provided in which front and rear surfaces of a semiconductor element may define a thin region which has a first thickness and a thicker region having a thickness at least about twice the first thickness. A semiconductor device may be present at the front surface, with a plurality of first conductive contacts at the front surface connected to the device. A plurality of conductive vias may extend from the rear surface through the thin region of the semiconductor element to the first conductive contacts. A plurality of second conductive contacts can be exposed at an exterior of the semiconductor element. A plurality of conductive traces may connect the second conductive contacts to the conductive vias.

A semiconductor chip includes a semiconductor substrate 126, in which first and second active regions are disposed. A resistor 124 is formed in the first active region and the resistor 124 includes a doped region 128 formed between two terminals 136. A strained channel transistor 132 is formed in the second active region. The transistor includes a first and second stressor 141, formed in the substrate oppositely adjacent a strained channel region 143.

Methods for filling a gap feature on a substrate surface are disclosure. The methods may include: providing a substrate comprising one or more gap features into a reaction chamber; and partially filling the one or more gap features with a molybdenum metal film by a cyclical deposition-etch process, wherein a unit cycle of the cyclical deposition-etch process comprises: partially filling the one or more gap features with a molybdenum metal film by a performing at least one unit cycle of a first cyclical deposition process; and partially etching the molybdenum metal film. The methods may also include: filling the one or more gap features with molybdenum metal film by performing at least one unit cycle of a second cyclical deposition process. Semiconductor device structures including a gap fill molybdenum metal film disposed in one or more gap features in or on a surface of a substrate formed by the methods of the disclosure are also disclosed.

It is an object of the present invention to provide a rectifier circuit that can suppress deterioration or dielectric breakdown of a semiconductor element due to excessive current. A rectifier circuit of the present invention includes at least a first capacitor, a second capacitor, and a diode which are sequentially connected in series in a path which connects an input terminal and one of two output terminals, and a transistor. The second capacitor is connected between one of a source region and a drain region and a gate electrode of the transistor. Further, the other one of the source region and the drain region and the other one of two output terminals are connected each other.

A semiconductor device which has a high performance integrated circuit formed of an inexpensive glass substrate and capable of processing a large amount of information and operating at higher data rates. The semiconductor device includes semiconductor elements stacked by transferring a semiconductor element formed on a different substrate. A resin film is formed between the stacked semiconductor elements and a metal oxide film is partially formed between the stacked semiconductor elements as well. A first electric signal is converted to an optical signal in a light emitting element electrically connected to one of the stacked semiconductor elements. Meanwhile, the optical signal is converted to a second electric signal in a light receiving element electrically connected to another one of the stacked semiconductor elements.

A method for fabricating semiconductor components and interconnects includes the steps of providing a substrate, such as a semiconductor die, forming external contacts on opposing sides of the substrate by laser drilling vias through the substrate, and forming conductive members in the vias. The conductive members include enlarged terminal portions that are covered with a non-oxidizing metal. The method can be used to fabricate stackable semiconductor packages having integrated circuits in electrical communication with the external contacts. The method can also be used to fabricate interconnects for electrically engaging packages, dice and wafers for testing or for constructing electronic assemblies.

A method and a device can be used for checking the layout of an electronic circuit of a semiconductor component. For example, the method includes an automatic classification of cells in at least one layout into a cell database, and an automatic layout checker comparing the cell database to a layout to be checked.

An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.

A method of making a light active sheet. A bottom substrate having an electrically conductive surface is provided. A hotmelt adhesive sheet is provided. Light active semiconductor elements, such as LED die, are embedded in the hotmelt adhesive sheet. The LED die each have a top electrode and a bottom electrode. A top transparent substrate is provided having a transparent conductive layer. The hotmelt adhesive sheet with the embedded LED die is inserted between the electrically conductive surface and the transparent conductive layer to form a lamination. The lamination is run through a heated pressure roller system to melt the hotmelt adhesive sheet and electrically insulate and bind the top substrate to the bottom substrate. As the hotmelt sheet is softened, the LED die breakthrough so that the top electrode comes into electrical contact with the transparent conductive layer of the top substrate and the bottom electrode comes into electrical contact with the electrically conductive surface of the bottom substrate. Thus, the p and n sides of each LED die are automatically connected to the top conductive layer and the bottom conductive surface. Each LED die is encapsulated and secured between the substrates in the flexible, hotmelt adhesive sheet layer. The bottom substrate, the hotmelt adhesive (with the embedded LED die) and the top substrate can be provided as rolls of material. The rolls are brought together in a continuous roll fabrication process, resulting in a flexible sheet of lighting material.