63 results about "Quantization (signal processing)" patented technology

A signal processing system includes a look-ahead delta-sigma modulator that processes multiple output candidate vectors and an input vector to determine a quantization error vector for each output candidate vector. In one embodiment, the quantization error vector represents a difference between a cost value vector and an input candidate vector. Look-ahead delta-sigma modulator output values are selected using the quantization error vectors by, for example, determining the minimum power quantization error vector for each input vector X and selecting the output value from the input candidate vector associated with the minimum power quantization error vector. Quantization error vectors can also be weighted using a non-uniform weighting vector.

A coherent receiver 1 assigns a first transmission signal to first transmission polarization, assigns a second transmission signal to second transmission polarization, and receives a quadrature multiplexed signal formed by applying quadrature multiplexing to the first transmission polarization and the second transmission polarization. The coherent receiver includes a detection means 10 for detecting the first transmission polarization and the second transmission polarization according to prescribed first reception polarization and second reception polarization and obtaining a first detected signal and a second detected signal; a quantization means 20 for quantizing the first detected signal and the second detected signal and obtaining a first quantized signal and a second quantized signal; and a signal processing means 30 for, when filtering the first quantized signal and the second quantized signal using a prescribed filtering control algorithm to form a first demodulated signal and a second demodulated signal respectively, adjusting filter coefficients of the filtering control algorithm according to the first quantized signal and the second quantized signal and the first demodulated signal and the second demodulated signal, and outputting the first demodulated signal and the second demodulated signal to a first output terminal and a second output terminal, respectively.

The invention belongs to the technical field of multimedia information security and particularly relates to a robustness digital watermark method based on chaotic mapping and singular value decomposition. The method comprises the following steps of: (1) a watermark embedding process, including the steps of: using the chaotic mapping for carrying out arrangement scrambling on n*n original images to obtain noise maps; blocking the noise maps subjected to the arrangement scrambling; carrying out singular value decomposition on each block to obtain a diagonal matrix, and embedding the watermark images into the maximum singular value of the corresponding block diagonal matrix one pixel by one pixel to complete the watermark embedding; and (2) a watermark detecting process, including the steps of: carrying out arrangement scrambling on watermark adding images by using the chaotic mapping; blocking the watermark adding images subjected to the arrangement scrambling; and carrying out singular value decomposition on each block to obtain a diagonal matrix, and using the diagonal matrix and a set quantization coefficient to obtain watermark images by calculation. The method provided by the invention has higher safety and better robustness, and the watermark embedded with images has higher robustness performance on image compression, image geometric distortion, image signal processing and the like.

The invention discloses a one-bit signal single snapshot direction-of-arrival estimation method and related components. According to the method, the characteristics of frequency modulation one-bit quantitative sampling and one-bit signal single-snapshot direction-of-arrival estimation are combined; echo signals received by the front end of an array radar system are firstly subjected to dechirpingprocessing and frequency shift processing, then frequency modulation one-bit quantization is carried out, AD sampling is carried out, and then direction-of-arrival estimation of a detected target is carried out in a signal processing system at the rear end of the array radar by adopting single sampling snapshot. One-bit quantitative sampling at the front end of the array radar is highly matched with single-snapshot direction-of-arrival DOA estimation of one-bit signals at the rear end of the array radar; the structure of an array angle measurement radar system can be simplified, the cost of data acquisition, transmission, storage and processing is reduced, the design complexity of the system is reduced, and the real-time processing capacity of the system is improved. Accurate one-bit signal single-snapshot direction-of-arrival estimation is realized, and the super-resolution direction-of-arrival estimation quality is improved.

The invention relates to the field of digital signal processing, in particular to a quantization method and system based on neural network difference. Specifically include: training the network model, initializing the network model; using the training parameter expression form of the network model as the change amount based on the initialization model parameters; clustering and quantifying the change amount of the training parameter expression form of the network model, The corresponding compact representation of the network model is obtained. The invention solves how to improve the performance of the neural network model as much as possible under the condition of low-bit quantization under the condition that the pre-training model exists.

The invention provides a signal processing device, method and analog-to-digital converter. Wherein, the signal processing device includes: an input terminal for receiving an analog signal; a quantization module for converting the analog signal into a digital signal, and the digital signal includes a multi-digit digital output code; a randomization module for receiving the h-bit digital output code randomly flipped by thermal noise in the multi-bit digital output code, and using the h-bit digital output code to randomize the quantization path, where h is a positive integer.

The invention discloses a method for calculating the root Cramero lower bound of cloud MIMO radar based on quantitative data, which belongs to the technical field of radar, and particularly relates to the calculation of the parameter estimation performance bound in radar signal processing. The technical problem solved by the present invention in view of the deficiencies of the background technology is to obtain the cloud MIMO radar joint target velocity and position parameter estimation based on quantitative data, using two processing methods of direct analysis and quantization and approximate analysis and quantization, and performing maximum likelihood estimation. , and computes the Cramero bound. The direct analysis quantization calculated by the method of the present invention and the Cramero bound when the quantization effect is approximated as a Gaussian error can be used to evaluate the performance of cloud MIMO radar joint target velocity and position parameter estimation, and the effect of quantization on performance is considered, This reduces the complexity of implementation and is closer to engineering applications.

An audio signal output device includes an audio signal acquisition unit configured to acquire audio signals of a plurality of channels, a first electronic controller, and an output unit. The first electronic controller includes a quantization bit expansion unit configured to expand the number of quantization bits of each of the audio signals to generate an expansion region for each of the audio signals, and an audio signal processing unit configured to generate an output signal in which the plurality of channels are downmixed such that an audio signal of at least one channel from among the plurality of channels is arranged at a reference bit position different from a reference bit position for an audio signal of a different channel of the plurality of channels, by using the expansion region. The output unit is configured to output the output signal.

The invention belongs to the technical field of signal processing and communication systems, and discloses an FPGA implementation method based on the threshold vector circle OFDM signal direct clipping technology; the method of using a lookup table is used to realize direct clipping on the FPGA hardware platform, and the pre-calculated threshold The coordinates on the vector circle are stored in the ROM of the FPGA, and the ROM address is determined according to the tangent value of the signal phase, which reduces the computational complexity and reduces the delay at the sending end of the OFDM system under the premise of ensuring that the PAPR meets the index requirements, and only exists The quantization error of a table lookup. The invention only stores points on one-eighth of the vector circle, and other parts are obtained through triangular transformation, thereby reducing the use of ROM resources in the FPGA. The invention is applied to any communication system developed on the FPGA platform and using the OFDM transmission mode, and realizes the direct amplitude limitation of the signal under a small system overhead, so as to reduce the PAPR.

The invention discloses a digital receiver system based on FPGA and a radio frequency analog-to-digital conversion method. The system comprises a power distribution module, a reference signal generation module, a radio frequency analog-to-digital conversion module and a digital signal processing module. The radio frequency analog-to-digital conversion method comprises the following steps of: dividing a radio frequency signal in any frequency band into (n-1) paths; the digital reference signal generated by FPGA is filtered to obtain the analog reference signal. A digital signal is obtained by analog-to-digital conversion of a radio frequency signal in any frequency band. The direct RF analog-to-digital conversion of the analog signal can be realized by the RF analog-to-digital method. For RF signals of different frequency bands and different standards, the whole signal processing process from RF quantization to baseband demodulation is carried out in the digital domain of FPGA, which eliminates the analog local oscillator, mixer and IF filter, and effectively avoids the loss and distortion of analog devices.

The invention discloses an accurate and efficient realization method and device for linear frequency modulation signal autocorrelation operation. The method includes: quantization step, buffer step, filter step and output step. Each unit of the device for accurately and efficiently realizing the autocorrelation operation of the linear frequency modulation signal corresponds to the method. The present invention provides an accurate and efficient implementation method and device for the autocorrelation operation of the chirp signal. The biggest feature of the method is to use the FIR filter bank to realize the autocorrelation operation of the chirp signal. The overall effect is parallel processing through the FIR filter The architecture can realize simultaneous output of autocorrelation results with different delays. The FIR filter can be realized by using the FFT algorithm, and the operation speed is relatively fast. The method also has the advantages that the processing signal is a digital quantity, the calculation accuracy is high and there is no drift; it is suitable for high-speed parallel multi-channel digital signal processing; the memory can be used efficiently, and in some application scenarios, the FIR filter bank can be stored in a memory such as ROM. coefficient, the implementation cost is small.