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94 results about "Look-ahead" patented technology

In backtracking algorithms, look ahead is the generic term for a subprocedure that attempts to foresee the effects of choosing a branching variable to evaluate one of its values. The two main aims of look-ahead are to choose a variable to evaluate next and the order of values to assign to it.

Configuring state machines used to order and select matching operations for determining whether an input string matches any of at least one regular expression using lookahead finite automata based regular expression detection

State machines used to order and select matching operations for determining whether an input string matches any of at least one regular expression are configured by (1) accepting the set of regular expression(s), and (2) for each of the regular expression(s) of the set accepted, (A) identifying any look-ahead type strings within the given regular expression, (B) identifying any sequential type strings within the given regular expression, (C) partitioning the regular expression based on any identified simple strings, any identified look-ahead type variable strings, and any sequential type variable strings to generate partitioned parts of the given regular expression, (D) reordering the partitioned parts of the given regular expression using optimization policies to generate reordered partitioned parts of the regular expression, and (E) configuring nodes of a state machine corresponding to the given regular expression, by recording configured information of the nodes on a tangible storage medium, using (i) an order of the reordered partitioned parts of the regular expression, and (ii) a string type of the partitioned parts of the regular expression. Once configured, the state machines may accept an input string, and for each of the regular expression(s), check for a match between the input string accepted and the given regular expression using the configured nodes of the state machine corresponding to the given regular expression. Checking for a match between the input string accepted and the given regular expression using configured nodes of a state machine corresponding to the given regular expression by using the configured nodes of the state machine may include (1) checking detection events from a simple string detector, (2) submitting queries to identified modules of a variable string detector, and (3) receiving detection events from the identified modules of the variable string detector.
Owner:POLYTECHNIC INSTITUTE OF NEW YORK UNIVERSITY

Dynamic adaptive speed look-ahead control method of continuous small line segment trajectories

The invention discloses a dynamic adaptive speed look-ahead control method of continuous small line segment trajectories. The method comprises the steps that S1 the maximum speed of connecting points is calculated and the speed look-ahead number of segments is determined; S2 entering a deceleration area or not is judged, and the process jumps to the step S3 if the judgment result is no; S3 initial speed and end speed are compared; and the process jumps to the step S4 if the initial speed is greater than the end speed; S4 whether the deceleration distance constraint condition is met is judged; and the process jumps to the step S7 if the judgment result is yes, or the process jumps to the step S5; S5 whether the deceleration distance in which the initial speed reduces to the end speed is less than the current line segment displacement length is judged, and the process jumps to the step S7 if the judgment result is yes, or the process jumps to the step S6; S6 the maximum initial speed of the current segment displacement length constraint is searched and cycling is performed until tracing back to the look-ahead start point; S7 the non-look-ahead path is updated and whether the segment of the current line segment is less than the look-ahead number of segments is judged, and the process jumps to the step S2 if the judgment result is yes, or the process jumps to the step S8; and S8 speed look-ahead control is ended. High-speed connection of transition speed between the continuous trajectories can be effectively realized so that the processing time can be greatly shortened and the processing efficiency can be enhanced.
Owner:深圳市旗众智能科技有限公司

Method and system for multiple pass video coding

A real-time MPEG video coding system with information look-ahead for constant bit rate (CBR) applications, such as, for example, Video-on-Demand (VoD) over ADSL. This scheme employs two MPEG encoders. The second encoder has a buffer to delay the input by an amount of time relative to the first encoder to create a look-ahead window. In encoding, the first encoder collects the information of statistics and rate-quality characteristics. An on-line information processor then uses the collected information to derive the best coding strategy for the second encoder to encode the incoming frames in the look-ahead window. The second encoder uses the encoding parameters from the processor as the coding guide to execute the coding strategy and generate the final bitstream.
Owner:IBM CORP

Low-latency architectures for high-throughput viterbi decoders

Digital circuits and methods for designing digital circuits are presented. More particularly, the present invention relates to error correction circuits and methods in communications and other systems. In the present invention, a novel K-nested layered look-ahead method and its corresponding architecture, which combine K-trellis steps into one trellis step (where K is the encoder constraint length), are proposed for implementing low-latency high through-put rate Viterbi decoder circuits. The main idea of the present invention involves combining K-trellis steps as a pipeline structure and then combining the resulting look-ahead branch metrics as a tree structure in a layered manner to decrease the ACS precomputation latency of look-ahead Viterbi decoder circuits. The proposed method guarantees parallel paths between any two trellis states in the look-ahead trellises and distributes the add-compare-select (ACS) computations to all trellis layers. It leads to regular and simple architecture for the Viterbi decoding algorithm. The look-ahead ACS computation latency of the proposed method increases logarithmically with respect to the look-ahead step (M) divided by the encoder constraint length (K) as opposed to linearly as in prior work. The main advantage of this invention is that it has the least latency among all known look-ahead Viterbi decoder circuits for a given level of parallelism.
Owner:PARHI KESHAB K

Look-ahead functionality tuning for independent sections

An agricultural product delivery system having a controller with a non-transitory computer readable medium configured to store instructions and a processor configured to execute the instructions. The instructions may include instructions to determine a first time-to-target of a first metering section of an agricultural implement in a field, determine a second time-to-target of a second metering section of the agricultural implement in the field, control a first motor coupled to the first metering section to an ON state when the first time-to-target is less than or equal to a first delivery delay of the first metering section, and control a second motor coupled to the second metering section to the ON state when the second time-to-target is less than or equal to a second delivery delay of the second metering section.
Owner:CNH IND CANADA

Reducing hardware costs for supporting miss lookahead

The disclosed embodiments relate to a system that executes program instructions on a processor. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system speculatively executes subsequent instructions in a lookahead mode to prefetch future loads. When an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to a corresponding architectural register. Instead the architectural register is marked as invalid. Note that by not updating architectural registers during lookahead mode, the system eliminates the need to checkpoint the architectural registers prior to entering lookahead mode.
Owner:ORACLE INT CORP

Systems and methods for providing a fine to coarse look ahead in connection with parametrization metrics in a graphics system

Systems and methods are provided for providing a fine-to-coarse look ahead in connection with parametrization in a graphics system. The use of a variety of parametrization metrics may be supplemented and improved by the fine-to-coarse look ahead techniques of the invention. First, the metric of a parametrization is minimized using a coarse-to-fine hierarchical solver, and then accelerated with a fine-to-coarse propagation. The resulting parametrizations have increased texture resolution in surface regions with greater signal detail at all levels of detail in the progressive mesh sequence.
Owner:MICROSOFT TECH LICENSING LLC

Viterbi decoder with survivor bits stored to support look-ahead addressing

In accordance with an embodiment of the present invention, a Viterbi decoder is described that operates on convolutional error correcting codes. The decoder allows for a pipelined architecture and a unique partitioning of survivor memory to maintain data integrity. Throughput rate is improved and stalling minimized by accessing memory words using a look-ahead function to fill the pipeline.
Owner:NVIDIA CORP

Signal processing with look-ahead modulator noise quantization minimization

A signal processing system includes a look-ahead delta-sigma modulator that processes multiple output candidate vectors and an input vector to determine a quantization error vector for each output candidate vector. In one embodiment, the quantization error vector represents a difference between a cost value vector and an input candidate vector. Look-ahead delta-sigma modulator output values are selected using the quantization error vectors by, for example, determining the minimum power quantization error vector for each input vector X and selecting the output value from the input candidate vector associated with the minimum power quantization error vector. Quantization error vectors can also be weighted using a non-uniform weighting vector.
Owner:CIRRUS LOGIC INC

Low-latency architectures for high-throughput Viterbi decoders

Digital circuits and methods for designing digital circuits are presented. More particularly, the present invention relates to error correction circuits and methods in communications and other systems. In the present invention, a novel K-nested layered look-ahead method and its corresponding architecture, which combine K-trellis steps into one trellis step (where K is the encoder constraint length), are proposed for implementing low-latency high-throughput rate Viterbi decoder circuits. The main idea of the present invention involves combining K-trellis steps as a pipeline structure and then combining the resulting look-ahead branch metrics as a tree structure in a layered manner to decrease the ACS precomputation latency of look-ahead Viterbi decoder circuits. The proposed method guarantees parallel paths between any two trellis states in the look-ahead trellises and distributes the add-compare-select (ACS) computations to all trellis layers. It leads to regular and simple architecture for the Viterbi decoding algorithm. The look-ahead ACS computation latency of the proposed method increases logarithmically with respect to the look-ahead step (M) divided by the encoder constraint length (K) as opposed to linearly as in prior work. The main advantage of this invention is that it has the least latency among all known look-ahead Viterbi decoder circuits for a given level of parallelism.
Owner:PARHI KESHAB K

Multi-cycle optimal corner interpolation method based on straight line segments and arc paths

The invention relates to a multi-cycle optimal corner interpolation method based on straight line segments and arc paths. The method comprises the following operation steps: (1) discretizing arcs in amachining path into straight line segments based on a specified processing error E; (2) determining corner transition time, corner speed, corner distance and corner acceleration a of each corner according to the maximum acceleration of each driving shaft of a numerical control machine tool, the corner machining precision, the geometrical parameters of the corner of the machining path and the optimization target of realizing the maximum sum of the speed before the corner and the speed after the corner; and (3) carrying out look-ahead processing: adjusting the optimal interpolation parameter ofeach corner to enable the machining speeds of the two ends of each straight line section meet the accessibility requirement. According to the method, the maximum acceleration capacity of each drivingshaft of the numerical control machine tool is fully utilized, the arcs in the machining path are dispersed into the straight line sections meeting the error requirement, the change in the speed direction at the corners is transited by adopting a plurality of interpolation periods, and a more efficient look-ahead processing method is adopted, so that the machining speed of a product is greatly increased.
Owner:UNIVERSITY OF CHINESE ACADEMY OF SCIENCES

Redundant mechanical arm real-time look-ahead trajectory planning method based on NURBS curve interpolation algorithm

PendingCN114131612AInterpolation speed increasedDoes not change the end interpolation speed directionProgramme-controlled manipulatorTrajectory planningControl theory
The invention discloses a redundant mechanical arm real-time look-ahead trajectory planning method based on an NURBS curve interpolation algorithm, and relates to the field of redundant mechanical arm application. According to the method, a tail end planning interpolation speed is obtained by giving a tail end target path point of the mechanical arm, constructing an NURBS parameter curve as a tail end expected path and adopting an acceleration and deceleration control algorithm, mechanical arm tail end path errors caused by interpolation are considered in a Cartesian space, the interpolation speed is limited according to bow height errors, a look-ahead algorithm is introduced, and the end planning interpolation speed is obtained. The interpolation speed is scaled by considering the joint speed and acceleration constraint of the mechanical arm, meanwhile, prediction of a deceleration point is achieved, NURBS curve interpolation is achieved through a pre-estimation correction method to obtain a tail end expected track, joint variables are solved through inverse kinematics, and joint limiting is achieved through redundancy characteristics and a gradient projection method. Real-time trajectory planning meeting the kinematics constraint condition of the mechanical arm is achieved, and the tail end trajectory tracking precision is guaranteed on the premise that the physical limit of the mechanical arm is not exceeded.
Owner:CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI

Method for fast compressing and decompressing music data and system for executing the same

MIDI compression and decompression methods that reduce the size of a standard MIDI file and maintains information to play the MIDI music. The exemplary method of the invention makes use of the high correlation and repetitions between a look-ahead MIDI event and previous set of MIDI events. An adjustable size Lempel-Ziv-like MIDI Event Search Window (MESW) is created during the compression and decompression process to allow searching of matched events or event elements in previous window size of MIDI events. Further reduction of the MIDI events can be made by discarding the matched events in the event search window. Therefore, with 4-bit of MIDI event search window, the number of MIDI events stored in the window can be more than 16.
Owner:VTECH TELECOMM

Intelligent contract vulnerability detection method based on combination of neural network and dynamic fuzzy test

The invention discloses an intelligent contract vulnerability detection method based on combination of a neural network and a dynamic fuzzy test, and the method comprises the steps: carrying out the static analysis of intelligent contract vulnerabilities through constructing a feedforward neural network model, marking a function execution path which may have vulnerabilities, carrying out the instrumentation of the function execution path which may have vulnerabilities through employing an SIF, utilizing a look-ahead analysis method to guide a fuzzy detector to carry out dynamic fuzzy detection on a function execution path which may have vulnerabilities, constructing a feedback mechanism based on a control flow and an intelligent contract state, guiding the fuzzy detector through feedback information to generate an effective test case, and carrying out the strategic dynamic fuzzy detection. Compared with a conventional intelligent contract vulnerability detection tool, the method has the advantages that a new scheme is provided, the situations of misjudgment, missing report and the like of a traditional single static detection or dynamic analysis method are effectively improved, and the method has good practical value and good reference significance.
Owner:ZHEJIANG GONGSHANG UNIVERSITY
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