The invention discloses a
microprocessor data flow address matching self-
trapping device. The
microprocessor data flow address matching self-
trapping device comprises a set of data flow address matching control registers with configurable
software, data flow address matching judgment logic, data flow address matching self-
trapping generation logic of precise interrupts and
microprocessor operating state storage logic, wherein if a data flow address meets specified requirements of the data flow address matching control registers, data flow address self-trapping of the precise interrupts is generated, and a processor can reserve an operating state, and not only facilitates program debugging for a user, but also provides powerful support for
operating system debugging. The microprocessor data flow address matching self-trapping device supports
software in a specified matching pattern (equal match or unequal match), specifying the type of 'an address to be matched'(a virtual address or a
physical address) and specifying the bit width of 'the address to be matched'(a full address or a partial address), and means of
software debugging are richened. According to the microprocessor data flow address matching self-trapping device, existing access and storage hardware logic is effectively used for achieving the function, and hardware design complexity and hardware cost need not to be increased obviously.