31 results about "Electron resists" patented technology

The preparation method for nano electrode comprises: growing well-conductive metal or semiconductor layer; using EBL to obtain a couple or group negative electronic anti-corrosive agent, and coating the agent; first baking; with electron beam to direct expose; developing, fixing, etching, and stripping the photoresist. The product has 20-100nm space and fit to wide application. This invention is simple and reliable, and compatible with traditional CMOS technology.

The invention discloses a method for making nanoscale graphics. The nanoscale graphics convert graphic data into binary signals to control the movement of the two-dimensional x-y direction of the micro-movement table and the loading of the metal tip voltage, and use the electrons generated after the tip is loaded with voltage. The beam is exposed to the electron resist, including: coating a layer of electroresist film on the surface of the sample, fixing the metal microtip on the micro-movement stage; loading the sample coated with the electroresist film on the Keep a certain distance from the micro-tip on the micro-motion table; place the micro-motion table loaded with metal tips and samples into the vacuum cavity, and use the vacuum pump to evacuate the cavity; use software programming to convert the processed graphic data into Binary signal, use the binary code to control the micro-motion stage to move in the two-dimensional x-y direction, and apply voltage to the metal microtip, and expose the electronic resist through the low-energy electron beam emitted by the tip under a strong electric field; The samples were developed and fixed. The invention effectively solves the problems of high cost of immersion lithography and proximity effect of focused electron beams affecting resolution.

The invention discloses a controllable preparation method of a germanium-silicon nano lower-dimension structure and the germanium-silicon nano lower-dimension structure. The controllable preparation method comprises the following steps of (a) cleaning a silicon substrate; (b) forming germanium-silicon alloy on the silicon substrate in an epitaxial growth mode to form an epitaxial substrate; (c) spreading electron resist and exposing the required germanium-silicon nano lower-dimension structure graph on the electron resist through the electron beam photolithography; (d) transferring the germanium-silicon nano lower-dimension structure graph to the epitaxial substrate through dry etching to obtain a sample; (e) removing the electron resist on the sample; (f) performing oxidation and anneal under a high-temperature environment to enable oxygen to react with silicon preferentially to form silicon oxide and germanium to be separated out; (g) performing anneal in a nitrogen and hydrogen mixing atmosphere to form the germanium-silicon nano lower-dimension structure. By means of the controllable preparation method, controllable preparation of the germanium-silicon nano lower-dimension structure in dimension, shape, position and component is achieved. Furthermore, the controllable preparation method has the advantages of being low in process difficulty, high in repeatability and capable of performing large-scale integration easily.