37results about How to "Thermal stress" patented technology

A method of producing a semiconductor apparatus, the method including forming metal ball bumps in direct contact with a circuit pattern of a semiconductor device, forming a resin film to seal spaces between the metal ball bumps, cleaning the surfaces of the metal ball bumps projecting out from the resin film using plasma cleaning by removing components inviting a rise in a connection resistance and a decline in a joint strength, forming eutectic solder layers different in composition from the metal ball bumps on the surfaces of the metal ball bumps, cutting the semiconductor substrate into unit semiconductor chips, and mounting at least one of the chips on a mounting board from a bump forming surface side of the chip so as to connect the eutectic solder layers to the mounting board with the resin film directly contacting the chip and not directly contacting the mounting board.

There is disclosed a ceramic structure which comprises a material having a controlled pore distribution and including cordierite as the main crystal phase. In the pore distribution, the volume of pores having pore diameters smaller than 20 μm accounts for 15% or less of the total pore volume, and the volume of pores having pore diameters of 20 to 100 μm accounts for 70% or more of the total pore volume. This ceramic structure is suitable for realizing a ceramic catalyst body which has excellent purification efficiency, is reduced in pressure loss, and is mountable even in a limited space.

The invention provides a thermal insulation structure with an adjustable cold core for growth of sapphire single crystals by virtue of a kyropoulos method. A metal sheet made from tungsten or molybdenum is taken as a heat shield, wherein the heat shield comprises a horizontal type heat shield and a vertical type heat shield, and a gap between the shields is supported by adopting molybdenum bars at vertical intervals; a space between a stainless steel drum and the vertical type heat shield is divided into an inner layer filling region and an outer layer filling region by virtue of molybdenum plates and cylinders at intervals, the inner layer filling region is filled with zirconium oxide (ZrO2) hollow bubble shells, the outer layer filling region is divided into multiple vertical cubicle structures by adopting vertical molybdenum plates at intervals, and multiple cubicles form a symmetry structure taking the axis of a cylinder as the center; according to a cold core offset direction of an upper furnace, ZrO2 bubble shells are filled in the cubicles at one side of the offset direction or molybdenum slats with the same width of the cubicles are inserted in the cubicles, and a thermal insulation effect of the side of the offset direction is enhanced, so that the cold core moves toward the reverse direction of the offset direction, the effect that the cold core is arranged at a central position of a crucible is guaranteed, radial uniform distribution of a thermal filed in a furnace is improved, and the effects of seeding conveniently, reducing thermal stress inside crystals and preventing the crystals from adhering onto a boiler can be achieved.

The present invention relates to a method of manufacturing a wiring board comprising: a build-up layer, in which wiring patterns are piled with insulating layers; and a core substrate, which is separately formed from the build-up layer, the method comprising the steps of: separably forming the build-up layer on a plate-shaped support; electrically connecting the core substrate to the wiring patterns of the build-up layer on the support; and removing the support from the build-up layer so as to form the wiring board, in which the build-up layer is connected to the core substrate. By separably forming the build-up layer and the core substrate, the wiring board effectively exhibiting characteristics thereof can be produced.

A carbon electrode has a conical or pyramidal tip, wherein the tip is surrounded on its side by a raised edge.

A package unit to be mounted on an external printed board includes a package board mounted with an exoergic circuit element, a heat spreader that transmits heat from the exoergic circuit element to a heat sink that radiates the heat, a joining member that seals between the exoergic circuit element and the heat spreader, and forms a sealing space in cooperation with the exoergic circuit element and the heat spreader, and a liquid metal sealed in the sealing space.

To provide a fine carbon fiber / metal composite material having high mechanical strength, a high thermal conductivity and a low coefficient of thermal expansion and suitable as a substrate for an electronic device.A fine carbon fiber / metal composite material, which is prepared by pressure impregnating a molded product containing fine carbon fibers having a fiber diameter of from 0.5 to 500 nm and a fiber length of at most 1,000 μm, having a multilayer structure wherein cylindrical carbon layers overlap one another, and having a hollow-structured central axis, with aluminum, magnesium, copper or an alloy of such a metal, by molten metal forging.

A multi-layer wiring for use with thin film transistors (TFTs), methods of manufacturing the multi-layer wiring, and TFTs employing the multi-layer wiring are provided. In one embodiment, the multi-layer wiring includes a main wiring and a sub-wiring on the main wiring. The main wiring includes a first metal and the sub-wiring includes an alloy wherein a majority of the alloy is the first metal. The multi-layer wiring can exhibit decreased electrical resistance and a reduced tendency to develop malfunctions such as hillocks or spiking. The multi-layer wiring can also exhibit improved contact characteristics with other conductive elements of TFT display devices.

A circuit board that can decrease thermal stress acting between a semiconductor element and a board in association with temperature alteration and has high mechanical strength (rigidity) as a whole board (including a multilayer wiring layer) is provided. Ceramic base material having a coefficient of thermal expansion close to that of a semiconductor element and inner layer wiring are integrally sintered, and the circuit board is configured so that fine-lined conductor structure corresponding to a multilayer wiring layer in the inner layer wiring has predetermined width, intralayer interval and interlayer interval. Thereby, thermal stress acting between a semiconductor element and the board when the board is exposed to temperature alteration in a condition where it is joined with the semiconductor element is suppressed, rigidity of the board is maintained, and its reliability against temperature cycle is increased.

A method of operating an inverter for converting a DC power into AC power by use of a pulse width modulation switching scheme is provided is disclosed. The inverter is controlled by use of the pulse width modulation switching scheme to provide an alternating current based on a current demand signal defining an alternating current provided by the inverter. An upper current threshold and a lower current threshold are provided. An instantaneous value of the alternating current is measured. When the instantaneous value of the alternating current overshoots the upper current threshold or undershoots the lower current threshold, the pulse width modulation switching scheme is replaced by an amended switching scheme which controls the instantaneous value of the alternating current to be between the upper current threshold and the lower current threshold. The upper current threshold and the lower current threshold oscillate with at least one alternating phase.

A trench structure which is capable of promoting extension of a depletion layer and hardly causes thermal stress is provided. A semiconductor device includes a semiconductor substrate. A plurality of loop trenches is formed on the surface of the semiconductor substrate. Each loop trench is configured to extend so as to surround a region smaller than the region where a plurality of gate trenches is formed. Each loop trench is separated from other loop trenches. A second insulating layer is located in each loop trench. P-type fourth regions are formed in the semiconductor substrate. Each fourth region is in contact with a bottom surface of corresponding one of the loop trenches and is configured to extend along the corresponding one of the loop trenches.

There is provided an image sensor including: a plurality of first electrodes respectively formed within a plurality of pixel areas, the pixel areas being formed on a substrate; a protection layer formed on an upper surface of the substrate and including a plurality of contact holes respectively exposing the first electrodes of the pixel areas; a plurality of auxiliary electrodes respectively contacting with the first electrodes through the contact holes and extending to an upper surface of the protection layer of the pixel area; a photoconductive layer formed on both the first electrodes and on the auxiliary electrodes; and a second electrode formed on the photo conductive layer.

A method produces a connecting rod from a sintered material, which rod has at least one bore having a center axis, and has a first connecting rod eye in a connecting rod head, and a second connecting rod eye in a connecting rod foot, wherein the connecting rod head is connected with the connecting rod foot with a connecting rod shaft, wherein the bore is configured in the connecting rod shaft, wherein furthermore, the connecting rod is produced from a metallic powder, in accordance with a sintering process, for which purpose the powder is pressed into the corresponding mold to form a green compact, the bore is introduced into the green compact, and the green compact is afterward sintered. The bore is introduced into the green compact as a first and second partial bore, proceeding from the connecting rod foot and from the connecting rod head.