285results about How to "Small coefficient" patented technology

Systems and designs for tuning a wireless power transfer system are provided, which may include any number of features. In one embodiment, a wireless power transfer system can be configured such that resonant frequencies of the system move towards an operating frequency of the system as a coupling coefficient between the transmit and receive resonators becomes smaller. In another embodiment, a receive controller can be configured to control a current delivered to a DC load by comparing an actual current at the DC load to a current requested by the DC load and adjusting an angle or a magnitude of a voltage at the DC load to match the requested current. In another embodiment, a rectifier circuit can act as a controlled voltage source and be configured to tune resonant frequencies between the transmit resonator and the receive resonator. Methods of use are also provided.

A gate electrode is formed over a semiconductor region with a gate insulating film interposed therebetween. An extended high-concentration dopant diffused layer of a first conductivity type is formed in part of the semiconductor region beside the gate electrode through diffusion of a first dopant. A pocket dopant diffused layer of a second conductivity type is formed under the extended high-concentration dopant diffused layer through diffusion of heavy ions. The pocket dopant diffused layer includes a segregated part that has been formed through segregation of the heavy ions.

A retardation film which hardly causes shift or unevenness in retardation values and which has a refractive index profile of nx>nz>ny (that is, 0<Rth[590] / Re[590]<1) is provided. A retardation film according to an embodiment of the present invention comprises a stretched polymer film containing a styrene-based resin and a polycarbonate-based resin, which satisfies the following expressions (1) and (2): 100 nm≦Re[590]≦350 nm   (1) 0.2≦Rth[590] / Re[590]≦0.8   (2)

An object of the present invention is to provide a technique for improving characteristics of a TFT and realizing the structure of the TFT optimal for driving conditions of a pixel section and a driving circuit, using a smaller number of photo masks. A semiconductor device has a semiconductor film, a first electrode, and a first insulating film sandwiched between the semiconductor film and the first electrode, and further has a second electrode, and a second insulating film sandwiched between the semiconductor film and the second electrode. The first electrode and the second electrode overlap with each other across a channel-formed region which the semiconductor film has. A constant voltage is applied to the first electrode at any time.

A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

A semiconductor device comprising a semiconductor pellet mounted on a pellet mounting area of the main surface of a base substrate, in which first electrode pads arranged on the back of the base substrate are electrically connected to bonding pads arranged on the main surface of the semiconductor pellet. The base substrate is formed of a rigid substrate, and its first electrode pads are electrically connected to the second electrode pads arranged on its reverse side. The semiconductor pellet is mounted on the pellet mounting area of the main surface of the base substrate, with its main surface downward, and its bonding pads are connected electrically with the second electrode pads of the base substrate through bonding wires passing through slits formed in the base substrate.

The liquid crystal panel according to an embodiment of the present invention includes, in the stated order from a viewer side: a first polarizer; a first optical compensation layer; a liquid crystal cell; a second optical compensation layer; and a second polarizer, wherein:the first optical compensation layer has an absolute value of a photoelastic coefficient of 40×10−12 (m2 / N) or less, has an in-plane retardation Δnd of 90 nm to 200 nm, has relationships of the following Expressions (1) and (2), and functions as a protective layer on a liquid crystal cell side of the first polarizer; andthe second optical compensation layer has relationships of the following Expressions (3) and (4),Δnd(380)=Δnd(550)=Δnd(780)  (1)nx>ny>nz  (2)Rth(380)>Rth(550)>Rth(780)  (3)nx=ny>nz  (4).

A lead-free glass material for use in sealing, which has a glass composition being free of lead and exhibits high performance in the range of choices for the material to be sealed, the sealing processability, the sealing quality and the like, has a glass composition including four types of metal oxides of V2O5, ZnO, BaO and P2O5 as essential ingredients.

An acoustic wave filter device is capable of increasing the steepness of a filter characteristic at a boundary between a passband and an attenuation band and achieving a low loss in the passband. The acoustic wave filter device has a ladder circuit configuration including a plurality of series arm resonators and at least one parallel arm resonator. The anti-resonant frequency of the series arm resonator is different from that of the series arm resonator. The series arm resonator having the lowest anti-resonant frequency has a resonant frequency located in the passband and an electromechanical coupling coefficient less than an average of electromechanical coupling coefficients of the series arm resonators.

A method for manufacturing a microlens includes: ejecting liquid drops containing a material for forming microlenses from a liquid drop ejection head to make the liquid drops land on a substrate; and irradiating the liquid drops with ultraviolet light at least once at a time period between after the ejection of the liquid drops and immediately after the landing of the liquid drops on the substrate. In addition, an apparatus for manufacturing a microlens, includes: a liquid drop ejection head that ejects liquid drops containing a material for forming microlenses; a table that supports a substrate above which the microlenses are to be formed; and an ultraviolet light radiating device that irradiates with ultraviolet light one of: the liquid drops that are flying from the liquid drop ejection head to the substrate; and the liquid drops that has landed on the substrate.

Quartz member such as a quartz tube for semiconductor manufacturing equipment capable of heat treating a substrate to be treated without causing contamination, a manufacturing method of such quartz member, thermal treatment equipment furnished with such quartz member, and an analysis method of metal in quartz member are provided. A quartz specimen is immersed in hydrofluoric acid to expose a layer to be analyzed located at a prescribed depth. On an exposed surface, a decomposition liquid such as hydrofluoric acid or nitric acid is dripped to decompose only an extremely thin layer to be analyzed, followed by recovering of the decomposition liquid. The decomposition liquid is quantitatively analyzed by use of atomic absorption spectroscopy (AAS) or the like to measure an amount of metal contained in the decomposition liquid. From a difference of thicknesses before and after the decomposition and an area of dripped decomposition liquid, a volume of a decomposed layer to be analyzed is obtained. From this and the amount of metal contained in the decomposition liquid, a concentration of metal contained in the layer to be analyzed, in addition a diffusion coefficient of a layer to be analyzed is calculated. With thus obtained diffusion coefficient as an index, quartz material in which metal diffuses with difficulty is sorted out. With thus sorted quartz material, a quartz member used for semiconductor manufacturing equipment such as a quartz tube is manufactured.

The semiconductor device comprises: a semiconductor substrate (N+ substrate 110) containing a first conductivity type impurity implanted therein; a second conductivity type impurity-implanted layer (P+ implanted layer 114) at relatively high concentration, formed on the semiconductor substrate (N+ substrate 110); a second conductivity type impurity epitaxial layer (P− epitaxial layer 111) at relatively low concentration, formed on the second conductivity type impurity-implanted layer (P+ implanted layer 114); and a field effect transistor 100 (N-channel type lateral MOSFET 100)composed of a pair of impurity diffusion regions (N+ source diffusion layer 115 and N− drain layer 116) provided in the second conductivity type impurity epitaxial layer (P− epitaxial layer 111) and a gate electrode 117 provided over a region sandwiched with the pair of impurity diffusion regions (N+ source diffusion layer 115 and N− drain layer 116).

An exposure apparatus can mitigate the impact of fluctuations in the refractive index of ambient gas, and improve, for example, stage positioning accuracy. An exposure apparatus radiates an exposure illumination light to a wafer on a wafer stage through a projection optical system, and forms a prescribed pattern on the wafer, and comprises: a scale, which is provided to the wafer stage; a plurality of X heads, which detect information related to the position of the scale; a measurement frame that integrally supports the plurality of X heads and has a coefficient of linear thermal expansion that is smaller than that of the main body of the wafer stage (portions excepting a plate wherein the scale is formed); and a control apparatus that derives information related to the displacement of the wafer stage based on the detection results of the plurality of X heads.

A nitride semiconductor light-emitting device has an active layer of a single-quantum well structure or multi-quantum well made of a nitride semiconductor containing indium and gallium. A first p-type clad layer made of a p-type nitride semiconductor containing aluminum and gallium is provided in contact with one surface of the active layer. A second p-type clad layer made of a p-type nitride semiconductor containing aluminum and gallium is provided on the first p-type clad layer. The second p-type clad layer has a larger band gap than that of the first p-type clad layer. An n-type semiconductor layer is provided in contact with the other surface of the active layer.

A package for receiving electronic part has a heat radiating plate having a mounting area where the electronic part is mounted at a center portion of one main surface, a frame body adhered to the one main surface to surround the mounting area, and a wiring conductor derived from the inside to the outside of the frame body. The heat radiating plate has a metallic base body, a metallic body filling inside of the metallic base body, and a metal layer deposited on the metallic base body and the metallic body. The mounting area is formed on the metal layer so as to be located above the metallic body, both of the metallic body and the metal layer have higher thermal conductivity than the metallic body, and both of the frame body and the metallic base body have a smaller coefficient of thermal expansion than the metal layer.

A solar cell module includes: a photoelectric conversion body 101 having an uneven surface on a light-entering surface; and a protection layer 10 made of a resin and provided to cover the uneven surface. In a cross section of the protection layer 10 taken in parallel to a light-entering direction, a thickness W2 of a projected portion on the uneven surface is smaller than a thickness W1 of a recessed portion on the uneven surface.

The connection technology is provided in which, at the time of mounting the semiconductor device on the substrate, the thermal load or the stress, which is imposed upon the semiconductor device, is little, a reliability of the semiconductor device is obtained, a stand-off of the semiconductor device mounted on the substrate can be secured appropriately, and moreover the short circuit hardly occurs between the pads of the semiconductor device mounted on the substrate.The semiconductor device mounted on the substrate, in which the substrate includes an electrode pad, the semiconductor device includes an electrode pad, the electrode pad of the semiconductor device and the electrode pad of the substrate are connected with a conductive adhesive, and a spacer is provided between the semiconductor device and the substrate.

The invention discloses an infrared small target detection method for multi-scale spatio-temporal union filtering under a complex background. The method concretely comprises the following steps: 1, inhibiting a ghost effect, improving the image identification degree, establishing a multi-scale bilateral time-domain high-pass filtering nonuniformity correction model, and obtaining an infrared nonuniformity correction image; 2, enhancing the local contrast of a small target, establishing an image airspace complexity weighted-information entropy model by adopting the airspace complexity factors of the infrared nonuniformity correction image, and protruding the information entropy of a small target region; 3, improving the detection rate of the infrared small target, reducing the false alarm rate, establishing a multi-scale spatio-temporal union filtering model, and self-adaptively detecting small targets with different scales. The method is an infrared small target detection algorithm for multi-scale spatio-temporal union filtering under the complex background, and enriches the detection technology for the small targets with different scales.

Plasma processing equipment capable of increasing the heat resistance of a wave guide by using a high dielectric material, comprising a processing container 44 formed to allow vacuuming, a loading table 46 installed in the processing container for placing a processed body W thereon, a microwave transmission plate 72 installed in an opening part at the ceiling of the processing container, a flat antenna member 76 for feeding microwave into the processing container through the microwave transmission plate, a shield cover body 80 earthed so as to cover the upper part of the flat antenna member, and a waveguide 90 for feeding the microwave from a microwave generating source to the flat antenna member, characterized in that the waveguide is formed of a high dielectric waveguide 94 using the high dielectric material, whereby the heat resistance of the waveguide can be increased.

A composite material, which can be used as an encapsulant for an ultraviolet device, is provided. The composite material includes a matrix material and at least one filler material incorporated in the matrix material that are both at least partially transparent to ultraviolet radiation of a target wavelength. The filler material includes microparticles and / or nanoparticles and can have a thermal coefficient of expansion significantly smaller than a thermal coefficient of expansion of the matrix material for relevant atmospheric conditions. The relevant atmospheric conditions can include a temperature and a pressure present during each of: a curing and a cool down process for fabrication of a device package including the composite material and normal operation of the ultraviolet device within the device package.

A laminated wiring board comprising: a first wiring board forming wiring layers on the upper surface and on the lower surface of a first ceramic insulated substrate; and a second wiring board forming wiring layers on the upper surface and on the lower surface of a second ceramic insulated substrate; the wiring layer on the lower surface of the first wiring board and the wiring layer on the upper surface of the second wiring board being connected together through connecting electrodes; wherein a coefficient α1 of thermal expansion of the first ceramic insulated substrate at 0 to 150° C. and a coefficient α2 of thermal expansion of the second ceramic insulated substrate at 0 to 150° C. are satisfying the following conditions: α1<α2 α2−α1≦9×10−6 / ° C. The laminated wiring board offers a high degree of mounting reliability even when it is interposed between the electric device such as a silicon semiconductor device having a small coefficient of thermal expansion and an external circuit board such as a printed board having a large coefficient of thermal expansion.

An object of the present invention is to provide a technique for improving characteristics of a TFT and realizing the structure of the TFT optimal for driving conditions of a pixel section and a driving circuit, using a smaller number of photo masks. A semiconductor device has a semiconductor film, a first electrode, and a first insulating film sandwiched between the semiconductor film and the first electrode, and further has a second electrode, and a second insulating film sandwiched between the semiconductor film and the second electrode. The first electrode and the second electrode overlap with each other across a channel-formed region which the semiconductor film has. A constant voltage is applied to the first electrode at any time.

There is provided a silicon carbide porous article containing silicon carbide particles as an aggregate and an oxide as a bonding material. The silicon carbide particles are bonded together in a state that pores are held among the silicon carbide particles, and an additive amount of the oxide is 0.5 g / m2 or more and below 3.0 g / m2 with respect to a surface area of the silicon carbide particles.

A liquid crystal panel having improved contrast ratio in an oblique direction and good display evenness without causing shift or unevenness in retardation values due to shrinkage stress of a polarizer or heat of backlight is provided. A liquid crystal panel according to an embodiment of the present invention includes: a liquid crystal cell; a polarizer arranged on both sides of the liquid crystal cell; a first optical element arranged between one polarizer and the liquid crystal cell; and a second optical element arranged between the other polarizer and the liquid crystal cell, wherein: the first optical element comprises a retardation film containing a styrene-based resin and a polycarbonate-based resin and satisfying the following expressions (1) and (2); and the second optical element has substantially optical isotropy: 240 nm≦Re[590]≦350 nm  (1) 0.20≦Rth[590] / Re[590]≦0.80  (2).

A dielectric substance is laminated on one surface of a piezoelectric substance, and an IDT and reflectors are disposed as electrodes at a boundary between the piezoelectric substance and the dielectric substance, and the thickness of the electrodes is determined so that the acoustic velocity of the Stoneley wave is decreased less than that of a slow transverse wave propagating through the dielectric substance and that of a slow transverse wave propagating through the piezoelectric substance, thereby forming a boundary acoustic wave device.

Warping of a hybrid integrated circuit device 10 due to shrinkage on curing of a sealing resin 14 is suppressed. The hybrid integrated circuit device 10 includes: a conductive pattern 13 provided on a surface of a circuit board 11; circuit elements 15 fixed to the conductive pattern 13; thin metal wires 17 electrically connecting the circuit elements 15 to the conductive pattern; leads 16 which are connected to the conductive pattern 13 to become output or input and extended to the outside; and a sealing resin 14 which is made of a thermosetting resin and covers the circuit board 11 by transfer molding while at least a rear surface of the circuit board is exposed. Here, a thermal expansion coefficient of the sealing resin 14 is set to be smaller than a thermal expansion coefficient of the circuit board 11. Thus, warping of the circuit board 11 in an after cure step can be prevented.

The invention concerns an x-ray detector with a plurality of layers arranged one top of one another in the incident direction of the x-rays, whereby each of the layers comprises at least one photodiode and a luminophore layer applied thereon.