30results about How to "Reduce latch-up" patented technology

A triple-well CMOS structure having reduced latch-up susceptibility and a method of fabricating the structure. The method includes forming a buried P-type doped layer having low resistance under the P-wells and N-wells in which CMOS transistors are formed and forming a gap in a buried N-type doped layer formed in the P-wells, the is gap aligned under a contact to the P-well. The buried P-type doped layer and gap in the buried N-type doped layer allow a low resistance hole current path around parasitic bipolar transistors of the CMOS transistors.

A method for forming a semiconductor device includes forming a buried doped layer in a semiconductor substrate and forming a plurality of first trenches that expose the buried doped layer. A first dielectric layer is formed covering sidewalls of the first trenches, and a doped polysilicon layer is formed covering side surfaces of the first dielectric layer and bottom portions of the first trenches. The method also includes forming a second trench in each of the plurality of first trenches, each second trench extending through a bottom portion of the doped polysilicon layer and the buried doped layer into a lower portion of the substrate. The method also includes forming a second dielectric layer inside each second trench. An isolation pocket structure is formed that includes the doped buried layer at the bottom and sidewalls that includes the doped polysilicon layer sandwiched between the first and second dielectric layers.

The invention provides a cellsovary granulosa cell anti-aging product, and the preparation method and the application of the product. The invention applies cellsovary granulosa cells in preparation of anti-aging products. The cellsovary granulosa cell anti-aging product of the invention is characterized in that in vitro cultivated and amplified cultivation supernatant of female mammalian animal celsovary granulose cells and / or the cell extract is contained; and one or more than one pharmaceutically acceptable medical excipient and antioxidant are contained. Via the cellsovary granulosa cells,the invention is capable of proliferating and secreting large amounts of a plurality of bioactive substances. The invention adopts granulose cells with extremely high bioavailability and similar to female physiological characteristics to cultivate supernatant and the cell extract of the supernatant. The invention can be taken orally, absorbed by skin or be prepared into vaginal suppository to achieve the purpose of anti-aging.

The invention discloses a double-end-controllable groove type insulated gate bipolar transistor which comprises a substrate. The two ends of the transistor are of structures with the same shape and variable parameters. The invention further discloses a preparation method of the double-end-controllable groove type insulated gate bipolar transistor. The double-end-controllable groove type insulated gate bipolar transistor effectively solves the problems that a common groove IGBT reverse blocking capability is poor and the turn-off time is long. The double-end-controllable groove type insulated gate bipolar transistor is high in applicability, and can replace a small circuit with bidirectional characteristics composed of a plurality of semiconductor devices, energy is greatly saved, the electric energy utilization rate is greatly improved, and the urgent affair that not enough power is supplied in China at present is relieved.

The invention relates to a method for ion implantation of high doping concentration for reducing substrate defects. A high concentration (1E14-1E16 atom / cm 2 ) ion implantation program, wherein the ion implantation program includes a low ion beam current, the range of the low ion beam current is 1-7mA. Accordingly, the present method utilizes the low ion beam current to reduce substrate defects produced by the ion implantation process.

The invention relates to an on-site verification apparatus for an optical fiber current sensor, a usage method of the on-site verification apparatus and application of the on-site verification apparatus. The on-site verification apparatus for the optical fiber current sensor includes an optical fiber current detection sensing module and an optical fiber current detection processing and display module. The optical fiber current detection sensing module is composed of a light source, a linear polariscope, a polarization separator, a modulator, a transmission optical fiber, a 1 / 4 wavelength filter, an optical fiber sensing head, a reflector and a photoelectric detector. Proceeding from installation and debugging of the optical fiber current detection sensing module, the optical fiber current sensor on-site verification apparatus has reasonable control steps, is easy to operate, and can carry out efficient, economic and accurate error detection and quantity transmission on a DC heavy current sensor working on site for a long time; the optical fiber current sensor on-site verification apparatus is suitable for detecting and verifying a current detection sensor working on site for a long time in fields of electrolytic aluminum, electrolytic copper, electric smelting, electroplate and other electrochemical engineering; the on-site verification apparatus for the optical fiber current sensor is good in safety performance, large in measuring dynamic scope, high in frequency response degree, small in size and light in weight; and by adopting the on-site verification apparatus for the optical fiber current sensor, the measuring precision of a current detection apparatus can be raised, and needs of safety and stabilization of a power supply system are met.

The invention discloses an automatic locking method for a substation of a flexible direct current transmission system, including: (1) judging the control mode of the station and the operating status of the station and other stations; (2) if the station is in the constant DC voltage control mode, And the station is in the unlocked state while other stations are in the locked state, judge the current running state of the flexible DC system; (3) If the above conditions are met, start the blocking process of the station according to the received system (4) If the reactive power of the current converter station is zero, send a blocking trigger pulse signal to complete the blocking process. The automatic locking method of the present invention realizes the automatic locking of the control and protection system, shortens the locking process of the flexible direct current transmission system, effectively avoids the impact on the AC system caused by the misoperation of the control and protection system caused by human misoperation, and reduces the locking process of the entire flexible direct current system Time-consuming, reducing the complexity of the locking process.

A DC engineer AC bus splitting operation control method and reactive power control method, module and system are disclosed. The control logic of AC bus splitting operation is: when AC bus splitting operation is detected, the operation valve group on AC bus is not directly locked, and the reactive power control function is automatically switched from the whole reactive power control according to DCsystem of the whole station to the reactive power control according to AC bus separately. That is, according to the operating state of the valve group connected to each AC bus bar, the AC filter state and the AC bus bar state, if the reactive power of the bus bar meets the preset reactive power demand, the operating state of the valve group connected to the AC bus bar and the AC filter state aremaintained; If the reactive power of the bus bar does not meet the preset reactive power demand, the AC filter connected with the corresponding AC bus bar is automatically switched on and off according to the reactive power demand, and the power of the valve block connected with the corresponding AC bus bar or the blocking valve block is returned. The invention can effectively overcome the risk ofmislocking of the valve group existing in the busbar splitting operation protection in the current HVDC transmission project, reduce the valve group locking, effectively guarantee the safety of the electric network and bring practical economic benefits.

The invention discloses a controlled silicon device provided with a secondary conductive path and triggered with the help of diodes. The connection and the layout of controlled silicon and diodes are optimized, and a parasitic controlled silicon path formed by diode strings is adopted to realize the secondary conduction of the controlled silicon which is triggered with the help of the diodes, thus improving a current value of a clamp point when the voltage of the controlled silicon is clamped so as to avoid the occurrence of the latch-up. The silicon controlled device is simple in structure, even in current and good in robustness, and is stable and reliable. Compared with a traditional ESD (electronic static discharge) protection scheme of diodes and MOS (metal oxide semiconductor) tubes,the controlled silicon device provided by the invention is superior in area efficiency; and compared with a traditional protection scheme for controlled silicon triggered with the help of diodes, thecontrolled silicon device provided by the invention has the advantage of low latch-up risk.

The invention discloses a method for manufacturing a semiconductor element, which includes the following steps. A first stress layer and a second stress layer are respectively formed on the base. A buffer layer is formed on the first stress layer and the second stress layer. Implantation process is performed on the substrate to form a pre-cut surface in the substrate below the first stress layer and the second stress layer. A bonding process is performed to bond the carrier board to the buffer layer. A heat treatment is performed such that a portion of the substrate is separated from the pre-cut facet. The front-end fabrication process is performed on the pre-cut side of another part of the substrate.

The invention discloses an automatic locking method for a flexible direct-current transmission system. The automatic locking method includes the following steps of firstly, judging the control mode of a station; secondly, judging the current running state when the flexible direct-current system runs if the station is judged to have the active power control mode; thirdly, starting the locking process of the station according to a received system locking control instruction if all the conditions are met, and conducting power reduction control; fourthly, sending a locking window signal to complete the locking process if both the active power and the reactive power of the current converter station are zero. By means of the automatic locking method for the flexible direct-current transmission system, a control and protection system in a flexible direct-current transmission project is automatically locked, the locking process of the flexible direct-current transmission system is shortened, impact which is caused by control and protection system incorrect operation generated due to man-made incorrect operation and the like to an alternating-current system is effectively avoided, time consumption of the whole locking process of the flexible direct-current system is lowered, the complexity in the locking process is lowered, and running reliability of a direct-current power grid is improved.

The invention discloses a DC voltage preset control method and application of a voltage source converter. At a steady-state operation stage before a DC fault, a DC voltage preset control instruction value of a DC voltage controller is a rated value set by a converter station station-stage controller. During the period of the DC fault, the converter station station-stage controller switches the DCvoltage preset control instruction value from the rated value to a newly added control reference quantity after detecting the fault, wherein the newly added control reference quantity comprises a converter station bus voltage and / or DC voltages of all DC lines connected with the DC bus. The converter station station-stage controller takes the DC bus voltage or the minimum value of the DC bus voltage and the voltages of the DC lines as a target voltage preset control instruction value during the fault. After the DC fault is eliminated, the voltage preset control instruction value is switched from the target voltage preset control instruction value to the rated value. The method can reduce the impact on the transient stability of an AC power grid from a DC grid fault.

The invention discloses an electrostatic protection structure and a forming method thereof, and the structure comprises a substrate which is internally provided with a well region, and the well region comprises a first region, a second region and a third region which are adjacent to each other; the first gate structure and the second gate structure are located on the surface of the second region; the first doped region is located in the second region, and the first doped region, the first gate structure and the second gate structure are electrically connected; the second doped region stretches across the second region and the first region; the third doped region stretches across the second region and the third region, and the third doped region and the first doped region are located on the two sides of the second gate structure respectively; the fourth doped region and the fifth doped region are located in the first region, and the fourth doped region is electrically connected with the fifth doped region; the sixth doped region and the seventh doped region are located in the third region, and the sixth doped region is electrically connected with the seventh doped region. The performance of the electrostatic protection structure is improved.

The invention discloses a groove type insulated gate field effect tube. The groove type insulated gate field effect tube comprises an N-type epitaxial layer. A P-type injection layer is formed below the N-type epitaxial layer, a groove is formed in the upper portion of the N-type epitaxial layer, a gate oxide layer and a polysilicon gate are formed in the groove, a P-type trap and an N-type active area are formed on two sides of the groove, and the N-type active area is placed above the P-type trap. A circular hollowed-out structure is formed in the N-type active area, interlayer oxidation media are formed above the groove, the circular hollowed-out structure and the N-type active area, a P-type injection area is arranged below a contact hole, and the contact hole penetrates through the interlayer oxidation media and connects the N-type active area and the P-type injection area. The groove type insulated gate field effect tube reduces spurious base resistance (RB) of an NPN and reduces the area of an NPN emitter of a spurious thyristor at the same time, and therefore happening rates of latch-up effects of the spurious thyristor are reduced.