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Method of disposing ion with high doping concentration for lowering defect on substrate

A technology of ion implantation and high doping concentration, applied in the field of semiconductor integrated circuits, can solve problems such as substrate defects, affecting the performance of other components, and affecting product reliability.

Inactive Publication Date: 2004-05-26
MACRONIX INT CO LTD
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  • Claims
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Problems solved by technology

For example, in R.Troutman, "Latch-Up in CMOS Technology: The Problem and Its Cure." Kluwer Academic, Norwell, Mass. (1986) document, it is proposed to carry out high doping concentration (1E14--1E16 atom / cm 2 ) ion implantation method to reduce the lock-up phenomenon; however, although the ion implantation method with high doping concentration can achieve the purpose of reducing the lock-up phenomenon, the ion implantation manufacturing method with high doping concentration will cause substrate defects, For example, dislocation defect, etc.
[0003] In addition, it was also proposed to use trench isolation (Trench Isolation) to solve the latch-up phenomenon, as described in US Patent No. 5,937,288, but when trenching, it will also cause substrate defects
[0004] In addition, regarding the manufacturing method of the source and drain of Metal-Oxide-Semiconductor (MOS) components, it is usually formed by ion implantation with high doping concentration, so there will also be the above-mentioned base defects. The problem occurs, which seriously affects the reliability of the product (reliability)
[0005] In addition, although traditional high temperature (>1000°C) or rapid temperature rise and fall (temperature rise and fall rate>50°C / sec) thermal manufacturing methods can be used to eliminate substrate defects and achieve thermal activation (thermal activation), however, the high temperature The manufacturing method can affect the performance of other components, and the rapid heating and cooling manufacturing method is usually an additional manufacturing method, which increases the manufacturing cost

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  • Method of disposing ion with high doping concentration for lowering defect on substrate
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  • Method of disposing ion with high doping concentration for lowering defect on substrate

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Embodiment Construction

[0014] Embodiments of the present invention will be described below using the cross-sectional views of the manufacturing method shown in FIGS. 1-3. It should be noted here that although the present embodiment takes the MOS manufacturing method as an example, it does not limit the present invention. That is to say, the present invention is applicable to the ion implantation manufacturing method of any semiconductor products (such as CMOS, various memories, etc.).

[0015] First, please refer to figure 1 , providing a substrate 100 such as a silicon substrate (Si substrate). Then, using thermal oxidation, chemical vapor deposition or chemical oxidation, etc., to form a SiO 2 A gate oxide layer (not shown) of the first layer, and then a gate layer (not shown), such as a polysilicon layer, is deposited by chemical vapor deposition. Then, a patterned gate oxide layer 110 and a patterned gate layer 120 are formed through a lithographic etching process to form a gate structure 130...

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Abstract

A program of disposing ion with high doping concentration (1E14-1E16atom / cm2) is carried out for a substrate. The said program includes a low current of ion beam in range 1-7mA. In the invented method, using low current of ion beam lowers defect on substrate generated by the program of disposing ion.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit (integrated circuit; IC), in particular to an ion implantation method with high doping concentration for reducing substrate defects. Background technique [0002] In the use of Complementary Metal-Oxide Semiconductor (CMOS) devices, there is a shortcoming of the so-called latch-up phenomenon, and many methods to solve the latch-up phenomenon have been proposed at present. For example, in R.Troutman, "Latch-Up in CMOS Technology: The Problem and Its Cure." Kluwer Academic, Norwell, Mass. (1986) document, it is proposed to carry out high doping concentration (1E14--1E16 atom / cm 2 ) ion implantation method to reduce the lock-up phenomenon; however, although the ion implantation method with high doping concentration can achieve the purpose of reducing the lock-up phenomenon, the ion implantation manufacturing method with high doping concentration will cause substrate d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/265H01L21/324
Inventor 王嗣裕苏俊联
Owner MACRONIX INT CO LTD
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