Source/drain ion injecting method for lowering defect on substrate

Abstract

The invention relates to a method for ion implantation of high doping concentration for reducing substrate defects. A high concentration (1E14-1E16 atom / cm 2 ) ion implantation program, wherein the ion implantation program includes a low ion beam current, the range of the low ion beam current is 1-7mA. Accordingly, the present method utilizes the low ion beam current to reduce substrate defects produced by the ion implantation process.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit (integrated circuit; IC), in particular to an ion implantation method for reducing substrate defects with high doping concentration. Background technique [0002] In the use of Complementary Metal-Oxide Semiconductor (CMOS) devices, there is a shortcoming of the so-called latch-up phenomenon, and many methods to solve the latch-up phenomenon have been proposed so far. For example, in R.Troutman, "Latch-Up in CMOSTechnology: The Problem and Its Cure." Kluwer Academic, Norwell, Mass. (1986) document, it is proposed to carry out high doping concentration (1E14--1E16atom / cm 2 ) ion implantation method to reduce the latch-up phenomenon; however, although the ion implantation method with high doping concentration can achieve the purpose of reducing the latch-up phenomenon, the ion implantation manufacturing method with high dopant concentration will cause substrate defec...

AI Technical Summary

Problems solved by technology

For example, in R.Troutman, "Latch-Up in CMOSTechnology: The Problem and Its Cure." Kluwer Academic, Norwell, Mass. (1986) document, it is proposed to carry out high doping concentration (1E14--1E16atom / cm 2 ) ion implantation method to reduce the latch-up phenomenon; however, although the ion implantation method with high doping concentration can achieve the purpose of reducing the latch-up phenomenon, the ion implantation manufacturing method with high dopant concentration will cause substrate defects, such as bit Dislocation defect, etc.

[0003] In addition, it was also proposed to use trench isolation (Trench Isolation) to solve the latch-up phenomenon, as described in US Patent No. 5,937,288, but when digging trenches, it will also cause substrate defects

[0004] In addition, regarding the manufacturing method of the source and drain of Metal-Oxide-Semiconductor (MOS) components, it is usually formed by ion implantation with high doping concentration, so there will also be the above-mentioned substrate The problem of defects occurs, which seriously affects the reliability of the product (reliability)

[0005] In addition, although traditional thermal manufacturing methods of high temperature (>1000°C) or rapid temperature rise and fall (temperature rise and fall rate>50°C / sec) can be used to eliminate substrate defects and achieve thermal activation (thermal activation), however, this High-temperature manufacturing methods can affect the performance of other components, and rapid ramp-up and heating manufacturing methods are usually additional manufacturing methods, thus increasing manufacturing costs

Images