35results about How to "Increase the maximum oscillation frequency" patented technology

Methods of boosting the performance of bipolar transistor, especially SiGe heterojunction bipolar transistors, is provided together with the structure that is formed by the inventive methods. The methods include providing a species-rich dopant region comprising C, a noble gas, or mixtures thereof into at least a collector. The species-rich dopant region forms a perimeter or donut-shaped dopant region around a center portion of the collector. A first conductivity type dopant is then implanted into the center portion of the collector to form a first conductivity type dopant region that is laterally constrained, i.e., confined, by the outer species-rich dopant region.

An LED drive circuit of the present invention carries out, by use of a DC-to-DC converter (L202,Q202,D209A,C212), light control of an LED. The light control is carried out, in a region where a light control level is equal to or greater than a certain light control level, by a DC light control method for adjusting a pulse height of an LED drive current. The light control is carried out, in a region where a light control level is equal to or less than the certain light control level, by a PDM light control method for adjusting an off period of oscillation of the DC-to-DC converter.

The invention discloses an ultralow ohmic contact resistance graphene transistor comprising a substrate, and a source and a drain which are located on the substrate. A channel region is formed between the source and the drain. The channel region comprises a graphene layer, a dielectric layer and a gate from down to up successively. The preparation method of the ultralow ohmic contact resistance graphene transistor comprises the following steps: (1) the graphene layer is formed; (2) the dielectric layer is deposited; (3) on the dielectric layer, the channel region is covered with a photoresist pattern; (4) the exposed dielectric layer is corroded; (5) the exposed graphene layer is etched; (6) a source-drain ohmic contact metal is evaporated to form an ohmic contact metal layer; (7) the required source and drain regions are covered with the photoresist pattern; (8) the source and the drain are formed; (9) and the gate is formed. According to the method of the invention, the one-dimensional linear contact between the source-drain ohmic contact metal and the graphene can be realized so as to greatly reduce the contact resistance between the graphene and the metal, so that the maximum oscillation frequencycan be increased, and the applications of the graphene field effect transistor can be facilitated.

A method for manufacturing a bipolar semiconductor element and the bipolar semiconductor element are disclosed. The method includes: providing a first semiconductor region of the first conductivity type on the semiconductor substrate; providing a connection region of the first conductivity type on the first semiconductor region; providing a first insulating region on the connection region; A window is formed in the connection region so as to at least partially expose the first semiconductor region; a sidewall spacer is provided in the window so as to insulate the terminal region; a second semiconductor region of the second conductivity type is provided so as to cover the sidewall spacer, and surrounding A part of the first insulating region; remove the surrounding first insulating region and the sidewall spacer to form a gap between the connection region and the second semiconductor region; and when sealing the gap by means of the second insulating region, at the The inside of the sealed gap is equipped with a gas atmosphere or a vacuum atmosphere.

The present invention disclosed a structure and production method of reducing heterogeneous knot double -pole transistors B‑c knot capacitance. When making the base metal, first painting the first light barrier on the chip structureThe window, then coat the second light barrier, reduce the line width of the first window through the slightly shrinking and backflow process, etch the passivation layer in the first window to form the first opening, remove the third light obstruction and expose after removing the light resistance, and expose it.The second window formed on the first opening, and the line width of the second window is larger than that of the first opening, and then the deposit fund belongs to the second window and the base metal is formed in the first opening to remove the light resistance.The present invention has formed a base metal structure with width less than the top line. Without increasing the base resistance, the B -C edging area is reduced to reduce the effect of reducing the BAC connection capacitance, thereby improving the maximum oscillationfrequency.

The present invention discloses a T-gate and N-surface GaN / AlGaN fin-type high electron mobility transistor. The problems are mainly solved that the maximum oscillating frequency of a current microwave power device is small, the ohmic contact resistor is large and the short channel effect is severe. The transistor comprises from down to up: a substrate (1), a GaN buffer layer (2), a ALGaN barrier layer (3), a GaN channel layer (4), a gate medium layer (5), a passivation layer (6), a source gate electrode and a drain gate electrode. The buffer layer and the channel layer employ N-surface GaN materials; the GaN channel layer and the ALGaN barrier layer form GaN / AlGaN heterojunction; the gate electrode employs T-type gate and is wrapped at two sides and the upper portion of the GaN / AlGaN heterojunction to form a three-dimensional gate structure. The T-gate and N-surface GaN / AlGaN fin-type high electron mobility transistor has good gate-control capability, small resistor and the maximum oscillating frequency, and is able to be a microwave power device with the small size.

A semiconductor device comprises: an extrinsic base region; a first dielectric spacer on at least a part of a sidewall of the extrinsic base region adjacent to an emitter window region; an intrinsic base region; a base link region coupling the intrinsic base region and the extrinsic base region; a collector region underlying the intrinsic base region and having a periphery underlying the base link region; and a second dielectric spacer, separating the base link region from at least the periphery of the collector region; wherein said second dielectric spacer extends laterally beyond said first dielectric spacer to underlie said emitter window region.

The invention discloses a Y-shaped grid structure based on carbon-based materials, including a substrate of a carbon-based material channel layer, on which there is an integrated grid metal structure composed of a grid metal grid root and a grid metal grid cap, There is a first high-K gate dielectric layer between the gate metal structure and the carbon-based material channel layer, the lower part of the gate metal cap has a first width, and the upper part has a width greater than or equal to the first width. In the second width, two side surfaces are formed between the upper part and the lower part of the gate metal cap, and the second high-K gate dielectric layer is coated on the side surfaces respectively. At the same time, the preparation method of the Y-shaped gate structure is also proposed, which can form a self-aligned Y-shaped gate structure with only one exposure, and the process is simple and the operation is convenient. The Y-shaped gate structure based on carbon-based materials proposed by the present invention can further reduce parasitic effects while reducing gate resistance, and can improve the performance of carbon-based high-speed and high-frequency devices.

This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up HBT, reduction in base-collector junction capacity. For the collector-up HBT, window structures around the sidewalls of a collector are used to etch either the emitter layer disposed directly under the external base layer, or an emitter contact layer For the emitter-up HBT, window structures around the sidewalls of an emitter are used to etch either the collector layer disposed directly under the external base layer, or a collector contact layer. In both HBTs, the external base layer is supported by a columnar structure to ensure mechanical strength.

The invention discloses a 4H-SiC metal semiconductor field effect transistor having a partial sinking channel. The 4H-SiC metal semiconductor field effect transistor having a partial sinking channel, from the bottom to the top, comprises a 4H-SiC half insulation substrate, a P type buffer layer, and an N type channel layer; the N type channel layer surface is provided with a source electrode cap layer and a drain electrode cap layer; the surfaces of the source electrode cap layer and the drain electrode cap layer are provided with a source electrode and a drain electrode; a grating electrode is formed above the N type channel layer and close to one side of the source electrode cap layer; part of the grating electrode close to the source electrode cap layer concaves downwardly to form a concave grating structure; a concave grating drain drifting area is formed between the grating electrode and the drain electrode cap layer; a concave grating drain buffer layer is formed on the upper end surface of a P buffer layer and close to the portion between the drain electrode cap layer and the concave grating drain side; and the concave depth of the concave grating drain drifting area is identical to that of the concave grating drain buffer layer. The 4H-SIC metal semiconductor field effect transistor having a partial sinking channel has advantages that the drain electrode is big in output current, the breakdown voltage is high and frequency characteristic is good.