55results about "Single pulse train generator" patented technology

Disclosed herein is a functional electrical stimulation (FES) device and system. In one embodiment, sequential bipolar pulse stimulation may be provided to an area of a living body via one or more electrode leads applied to the area via a FES device comprising a current pulse generating circuit comprising output nodes for operative coupling to the one or more electrode leads, and configured for operative coupling to a voltage supply. The current pulse generating circuit generally comprises positive and negative stimulation paths drawing from the voltage supply to respectively apply positive and negative currents through the area via the one or more electrode leads. In one example, the stimulation paths comprise respective capacitive elements, a capacitance ratio of which dictating, at least in part, an amplitude ratio of the positive and negative currents, wherein periodic alternative activation of the stimulation paths provides the sequential bipolar pulse stimulation. In another example, each path comprises a respective charging element and a respective activation switch, wherein each respective charging element is charged by the voltage supply and discharged upon activation of the respective activation switch to generate positive and negative current pulses respectively, such that a pulse rise time of the positive and negative current pulses is predominantly dictated by a switching speed of each respective switch. Systems and uses for these devices, and FES in general, are also described.

The invention relates to a non-overlapping clock-generating circuit with independently regulated two-phase pulse duration, belonging to the field of non-overlapping clock-generating circuit. The circuit is characterized in that a time delay unit is provided in front of CLK2 of two-phase non-overlapping clock-generating circuit which can generate advance timing, the input of the time delay unit is connected with clock signals, the output thereof is connected with an input terminal CKL2 of an alternative denial gate; the time delay unit can be used to independently regulate the pulse duration of PH1 and PH2. When parameters meet the condition that TD is less than or equal to TD1+TD2, PH1 pulse duration of the clock is T / 2-TD2-TD, PH2 pulse duration of the clock is T / 2-TD2+TD; non-overlapping time between PH1 and PH2 is TD2; clock PH1E falls by TD2 earlier than PH1does, clock PH2E falls by TD2 earlier than PH2 does; when TD1 is equal to TD2, PH1E and PH1 can rise simultaneously, so do PH2E AND PH2. The circuit of the invention has the advantage that pulse duration, non-overlapping time and advance timing rising edge of the two-phase non-overlapping clock can be adjusted.

The invention is applied to the technical field of microwave and provides a microwave driving source mainly comprising a frequency synthesizer composed of a voltage adjusting control circuit, a voltage controlled crystal oscillator and a solid state oscillator, a cymometer, a modulator, a tuning controller, a microwave pulse power amplifier, a variable attenuator, a directional coupler, a detector, a power indicator and the like. The invention is characterized in that the output frequencies in the range from 40W to 200W are respectively and continuously adjusted, the frequency stability of output signals reaches to 5 multiplied by 10(-6), the frequency adjustment rang of output signals is larger than or equal to 4MHz, the driving source automatically indicate output frequency and output power in real time, the phase noise is low, and the clutter suppression ability is high.

A frequency tuning apparatus may include an oscillator and a memory element connected to the oscillator. The memory element may have a variable resistance. An oscillation frequency of the oscillator may vary according to a resistance state of the memory element. The oscillator may be a ring oscillator. The memory element may be connected to an input terminal or a power terminal of the oscillator.

A coupling clamp-type pulse injection apparatus, which can couple a high-voltage wideband pulse having a peak voltage of several tens of kV and having a rising time of several hundreds of ps or less to a cable without causing dielectric breakdown and a 50 ohm impedance mismatch, is provided. The pulse injection apparatus includes an input connector, an output connector, and a main body including an inner plate connected at a first end thereof to the input connector and at a second end thereof to the output connector, and a coupling plate connected to the inner plate and configured to fix a cable to the inner plate and to couple a high-power electromagnetic pulse input through the input connector to the cable.

A bipolar pulse generator is implemented in a simple structure while providing a high efficiency design having a relatively low total size, while still allowing access by fibers used to control a photoconductive switch that activates the generator. The bipolar pulse generator includes a stacked Blumlein generator structure with an additional transmission line connected to a load at its near end and short-circuited at its distal end. An extra transmission line is positioned between the Blumlein generator's structure and the load provides specified limited gap between positive and negative sub-pulses. The bipolar pulse generator further includes a bended Blumlein generator structure, in which an existing intrinsic “stray” transmission line is used to provide the bipolar pulse. Still further, bipolar pulse generator includes stepped transmission lines, with additional switches positioned between steps, which are charged by different voltages.

The invention discloses a multiphase non-overlapping clock circuit which comprises a delay module, a recurrent pulse generation module, a plurality of inverters and a plurality of RS triggers. The input end of the delay module is connected with one input end of the recurrent pulse generation module to serve as an input port of a mater clock. The output end of the delay module is connected to the other input end of the recurrent pulse generation module. The output end of the recurrent pulse generation module is connected to the setting ends of the RS triggers. The input ends of the inverters respectively serve as the input ports of a multiphase clock. The output ends of the inverters are respectively connected to the other input ends of the corresponding RS triggers. The output ends of the RS triggers respectively serve as the output ends of the multiphase non-overlapping clock. The multiphase non-overlapping clock circuit is simple in structure, small in occupied area of a chip, and high in reliability. By means of the circuit, processing can be carried out on the multiphase clock synchronous with the master clock.

The invention provides an artificial retina electrostimulation pixel circuit applied to visual function restoration, which comprises a photodiode, a capacitor C1, a Schmitt trigger, a CMOS phase inverter, a charge-discharge control loop and a stimulating electrode, wherein an anode of the photodiode is earthed, the external visible light is input of the photodiode, a cathode of the photodiode is connected with a first output end of the control loop, output of the Schmitt trigger is input of the CMOS phase inverter, an output end of the phase inverter is connected with the stimulating electrode, and the stimulating electrode serves as an output end of the pixel circuit; and an output end of the CMOS phase inverter is connected with a control end of the charge-discharge control loop, a second output end of the control loop is an input end of the Schmitt trigger, and the capacitor C1 is connected between the input end of the Schmitt trigger and the ground. The pixel circuit can remarkably improve the dynamic range of the circuit and greatly reduce the power consumption, the pulse width for the pixel circuit to output a pulse signal is fixed, the pixel area is reduced, the chip integration level is improved, and the practicability is strong.

Disclosed a programmable high frequency pulse signal generator comprises: a computer connects the port of DSK plate whose minor plate slots are connected to the outlet of ADC, the outlet of transceiver, the first DAC inlet and the inlet of D trigger; wherein, said inlet of ADC is the inlet of said programmable high frequency pulse signal generator; the outlet of trigger connects the second DAC; the outlets of first and second DAC are connected to the accumulator; the inlet of main power amplifier is connected to the inlet of accumulator while its outlet is the main outlet of said programmable high frequency pulse signal generator; the inlet of auxiliary power amplifier is connected to the outlet of D trigger while its outlet is the reference outlet of said programmable high frequency pulse signal generator; and the another end of transceiver is the trigging end.

A pulse pattern generator (11) has a pulse generating unit (12) and a lowpass filter (14), and the pulse generating unit (12) includes an amplitude-value setting unit (13, 13a). The pulse generating unit (12) generates a pulse signal formed in a step-like wave in which at least one of rise and fall of a signal is changed in a step-like manner. The lowpass filter (14) smoothes the pulse signal generated by the pulse generating unit (11), and outputs a smoothed pulse signal. The amplitude-value setting unit (13, 13a) adjusts an amplitude value of a step-like wave that forms the pulse signal in order to set a shape of an eye waveform based on a setting value when an eye pattern of the output from the lowpass filter (14) is formed. The pulse pattern generator (11) can output the pulse signal having a desired pulse pattern having the predetermined eye closure from the lowpass filter (14).

The invention relates to a method for effectively reducing electromagnetic emission in a local interconnection network (LIN) driver, and provides an LIN driver circuit which adopts a charging or discharging current applied to a gate of a driver transistor coupled to an LIN bus. The charging current comprises a constant charging current and an additional soft charging current; and the discharging current comprises a constant discharging current and an additional soft discharging current. By a soft charging or discharging component, the electromagnetic emission on the LIN bus is obviously reduced.

The present invention discloses a clock generator circuit for generating an output clock signal. The clock generator circuit includes: a random frequency code generator for generating a frequency code randomly, wherein the random frequency code generator is clocked by a first clock signal; an accumulator electrically connected to the random frequency code generator, for generating a selection code by accumulating the frequency code, wherein the accumulator is clocked by the first clock signal; a first multiplexer electrically connected to the accumulator, for selecting one of a plurality of reference clock signals as the first clock signal according to the selection code; and a toggle circuit electrically connected to the first multiplexer, being clocked by the first clock signal for generating the output clock signal. The invention can generate output clock signals selected with much more frequency.

A bipolar pulse generator is implemented in a simple structure while providing a high efficiency design having a relatively low total size, while still allowing access by fibers used to control a photoconductive switch that activates the generator. The bipolar pulse generator includes a stacked Blumlein generator structure with an additional transmission line connected to a load at its near end and short-circuited at its distal end. An extra transmission line is positioned between the Blumlein generator's structure and the load provides specified limited gap between positive and negative sub-pulses. The bipolar pulse generator further includes a bended Blumlein generator structure, in which an existing intrinsic “stray” transmission line is used to provide the bipolar pulse. Still further, bipolar pulse generator includes stepped transmission lines, with additional switches positioned between steps, which are charged by different voltages.

Disclosed herein is a functional electrical stimulation (FES) device and system. In one embodiment, sequential bipolar pulse stimulation may be provided to an area of a living body via one or more electrode leads applied to the area via a FES device comprising a current pulse generating circuit comprising output nodes for operative coupling to the one or more electrode leads, and configured for operative coupling to a voltage supply. The current pulse generating circuit generally comprises positive and negative stimulation paths drawing from the voltage supply to respectively apply positive and negative currents through the area via the one or more electrode leads. In one example, the stimulation paths comprise respective capacitive elements, a capacitance ratio of which dictating, at least in part, an amplitude ratio of the positive and negative currents, wherein periodic alternative activation of the stimulation paths provides the sequential bipolar pulse stimulation. In another example, each path comprises a respective charging element and a respective activation switch, wherein each respective charging element is charged by the voltage supply and discharged upon activation of the respective activation switch to generate positive and negative current pulses respectively, such that a pulse rise time of the positive and negative current pulses is predominantly dictated by a switching speed of each respective switch. Systems and uses for these devices, and FES in general, are also described.

The invention provides a method and a device for processing a synchronization signal, and relates to the technical field of power supplies. The problems of low accuracy and low speed of synchronization operation for the synchronization signal are solved. The method specifically comprises the following steps of: acquiring signals to be processed of a plurality of power supplies, wherein the signals to be processed are periodically variable signals; generating pulses in each period of each signal to be processed, and generating a synchronization signal of which the period is the same as that of the signal to be processed, wherein each period of the synchronization signal comprises at least two pulses; detecting whether the synchronization signal is normal or not by judging whether parameters of all the pulses in the synchronization signal are accurate or not; and if the synchronization signal is normal, performing time calibration on the pulses in the synchronization signal to synchronize the signals to be processed. The method and the device can be applied to the synchronization operation for signals.

The invention provides a method and a device for playing a digital audio which are applied in a digital audio broadcasting receiving terminal with local clocks. The method comprises the steps of counting the number of the local clocks in audio data frames, each audio data frame comprises a plurality of audio data; obtaining the number of the local clocks in the audio data according to the number of the local clocks in the audio data frames; counting the local clocks, generating a playing signal when counting the number of the local clocks in the audio data and outputting the audio data according to the playing signal for playing the audio. The invention enables the digital audio broadcasting receiving terminal to accurately obtain the audio playing frequency, leads the jitter of the audioplaying frequency to be reduced to the minimum and further ensures the playing quality of digital audio broadcasting.

A spread spectrum clock generator includes a phase comparator that compares a reference clock with a feedback clock, a low-pass filter that passes a predetermined low-frequency component, a phase lock loop that includes a voltage-controlled oscillator generating an output clock whose frequency corresponds to the filtered signal, a triangular wave controller that generates a triangular wave signal for frequency-modulating the spread spectrum clock based on the output clock, a delay controller that generates the feedback clock by controlling delay of the output clock based on the triangular wave signal, a first counter that counts the output clock and output a first count value, a second counter that counts the reference clock and output a second count value, and a phase error correction circuit that compares the first count value with the second count value and corrects phase error of the output clock.

The invention relates to a realizing method of a driving signal. Devices involved in the method comprise a low-frequency signal generator, a high-frequency signal generator, an H-bridge circuit and a logic circuit. The driving signal obtained by the method can realize complex driving signals of non-single period and level to directly drive electronic devices.

Disclosed in the invention is a pulse frequency multiplier circuit comprising a voltage input terminal, a resistor, a capacitor, a first NAND gate, a second NAND gate, a signal input terminal, and a signal output terminal. The resistor includes a first resistor and a second resistor; and the capacitor contains a first capacitor and a second capacitor. The signal input terminal is connected with two input terminals of the first NAND gate; an output terminal of the first NAND gate is connected in series with the second capacitor, the second resistor and the voltage input terminal and then is connected with an input terminal of the second NAND gate; the signal input terminal is connected in series with the first capacitor, the first resistor, and the voltage input terminal and then is connected with another input terminal of the second NAND gate; and an output terminal of the second NAND gate serves as a signal output terminal. According to the pulse frequency multiplier circuit, two NAND gates are used and frequency doubling of the input signal can be realized. Moreover, the structure is simple and the cost is low; and the circuit is suitable for various small electronic products.

The present invention relates to an electromagnetic acoustic transducer excitation system comprising a tone burst generator, the tone burst generator comprising: an oscillator device configured to produce a radio frequency signal; an analog switch configured to produce an output based on the radio frequency signal produced by the oscillator device and a control signal; a pre-amplifier configured to amplify the output of the analog switch and produce a tone burst output signal; and a control module configured to produce the control signal for providing to the analog switch.

A microwave energy source that generates a microwave energy is disclosed. The microwave energy source has an on-state and an off-state. A control circuit is coupled to the microwave energy source and includes an output to generate a control signal that adjusts a pulse frequency of the microwave energy. A voltage generator applies a non-zero voltage to the microwave energy source during the off-state. A frequency and a duty cycle of the non-zero voltage is based on a frequency and a duty cycle of the control signal. A waveguide is coupled to the microwave energy source. The waveguide has a supply gas inlet that receives a supply gas, a reaction zone that generates a plasma, a process inlet that injects a raw material into the reaction zone, and an outlet that outputs a powder based on a mixture of the supply gas and the raw material within the plasma.

The invention relates to the technical field of wireless communication, and discloses a device and a method for implementing a digital broadband excitation source. The device comprises a baseband forming unit, an interpolation filtering unit, a broadband frequency hopping unit and a digital-to-analog conversion unit which are sequentially connected in series, wherein the baseband forming unit, the interpolation filtering unit and the broadband frequency hopping unit are full-digital units; the baseband forming unit comprises a baseband interpolation pulse forming filter; the interpolation filtering unit comprises a half-band filter and a CIC (cascade integrator comb) filter which are connected in series; the broadband frequency hopping unit comprises a frequency mixer and a frequency hopping carrier generator which is coupled to the input end of the frequency mixer. According to the device and the method, the design architecture of the whole transmission channel is greatly simplified, the design difficulty and the design cost are reduced, and the reliability, flexibility and stability of a system are improved. A powerful technical support is provided for engineering implementation; meanwhile, a design scheme and an implementation way, which are more efficient and more practical, are provided for equipment and the system with requirements.

The portable magnetic field stimulator of the present invention has a microcontroller which sets sinusoidal wave or pulse voltage signals of different frequency, intensity, duty cycle through a manipulation interface, and inputs the signals to a pulse type voltage / current conversion circuit or sinusoidal wave type voltage / current conversion circuit. Finally, the current is transported to the stimulating coil to produce sinusoidal wave or pulse wave magnetic field having direct current level with frequency 1˜2 kHz and with magnetic flux 1˜300 Gauss. Thereby, not only the variation of frequency can be controlled but also the other subtle parameters such as duty cycle, multi wave form switching are also able to be manipulated and set, and different stimulating wave form of sinusoidal wave or pulse can also be produced. In addition, it can be applied in diversified symptoms.

The invention relates to a programmable non-overlapping clock generation circuit. The programmable non-overlapping clock generation circuit comprises two signal branches and an anti-phase module (3), wherein a branch A of the two signal branches comprises a logical module (11), a delaying module (12) and a selective control module (13) which are connected in series, the selective control module (13) is connected with a signal output end clka, a branch B of the two signal branches comprises a logical module (21), a delaying module (22) and a selective control module (23) which are connected in series, and the selective control module (23) is connected with a signal output end clkb. The programmable non-overlapping clock generation circuit changes the structure of an existing non-overlapping clock generation circuit, enables the structure of the existing non-overlapping clock generation circuit to generate non-stationary non-overlapping clock delaying, changes the delaying according to the different frequencies of input clock signals, and widens the application range.

A driver circuit that provides a driver pulse sequence with different adjustable driver pulse heights in different time segments is provided. The driver circuit includes n pulse generators that supply pulse height contributions to a summing node, wherein the supplying can be controlled by switching elements individual to the pulse generators, and further includes a control unit that controls at least some of the switching elements as a function of adjustable parameters. The driver circuit also includes a switching matrix with matrix elements, each one of which is associated with a pair having at least one of the time segments and at least one control parameter, and issues a control signal for exactly one switching element of one of the n pulse generators.

The invention discloses a frequency multiplier with high frequency multiplication number of times. The frequency multiplier mainly comprises a buffer circuit, a voltage controlled oscillating circuit connected with the buffer circuit, a microwave circuit, a control circuit connected with the microwave circuit, and a phase locked loop circuit connected with the control circuit. The frequency multiplier is characterized in that a frequency multiplier circuit is also arranged between the voltage controlled oscillating circuit and the microwave circuit, and the frequency multiplier circuit comprises an audion VT1, an audion VT2, a capacitor C7, and a resistor R3, wherein the cathode of the capacitor C7 is connected with the base electrode of the audion VT1, the anode of the capacitor C7 is connected with the voltage controlled oscillating circuit, one end of the resistor R3 is connected with the cathode of the capacitor C7, and the other end of the resistor R3 is connected with a resistor R4 and then is connected with the emitting electrode of the audion VT2. The frequency multiplier is provided with the frequency multiplier circuit which can increase the frequency multiplication number of times of the frequency multiplier, thereby having broad application range.

The invention relates to a non-overlapping clock-generating circuit with independently regulated two-phase pulse duration, belonging to the field of non-overlapping clock-generating circuit. The circuit is characterized in that a time delay unit is provided in front of CLK2 of two-phase non-overlapping clock-generating circuit which can generate advance timing, the input of the time delay unit is connected with clock signals, the output thereof is connected with an input terminal CKL2 of an alternative denial gate; the time delay unit can be used to independently regulate the pulse duration of PH1 and PH2. When parameters satisfy the condition that TD is less than or equal to TD1+TD2, PH1 pulse duration of the clock is T / 2-TD2-TD, PH2 pulse duration of the clock is T / 2-TD2+TD; non-overlapping time between PH1 and PH2 is TD2; clock PH1E falls by TD2 earlier than PH1does, clock PH2E falls by TD2 earlier than PH2 does; when TD1 is equal to TD2, PH1E and PH1 can rise simultaneously, so do PH2E AND PH2. The circuit of the invention has the advantage that pulse duration, non-overlapping time and advance timing rising edge of the two-phase non-overlapping clock can be adjusted.