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67 results about "P–n diode" patented technology

This article provides a more detailed explanation of p–n diode behavior than that found in the articles p–n junction or diode. A p–n diode is a type of semiconductor diode based upon the p–n junction. The diode conducts current in only one direction, and it is made by joining a p-type semiconducting layer to an n-type semiconducting layer. Semiconductor diodes have multiple uses including rectification of alternating current to direct current, detection of radio signals, emitting light and detecting light.

High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline

A programmable memory cell comprised of a transistor located at the crosspoint of a column bitline and a row wordline is disclosed. The transistor has its gate formed from the column bitline and its source connected to the row wordline. The memory cell is programmed by applying a voltage potential between the column bitline and the row wordline to produce a programmed p+ region to form a p-n diode in the substrate underlying the gate of the transistor. Further, the wordline is formed from a buried diffusion N+ layer while the column bitline is formed from a counterdoped polysilicon layer.
Owner:SYNOPSYS INC

Solar Cell Devices

A solar cell device includes a p-n diode component over a substrate, the p-n diode component including at least one subcell, each subcell including an n-type semiconductor layer and a p-type semiconductor layer to form a p-n junction. The solar cell device further includes at least two features selected from: i) a nano-structured region between at the p-n junction of at least one subcell; ii) an n-type and/or a p-type layer of at least one subcell that includes a built-in quasi-electric field; and iii) a photon reflector structure. Alternatively, the solar cell device includes at least two subcells, and further includes a nano-structured region at the p-n junction of at least one of the subcells, wherein the subcells of the solar cell device are connected in parallel to each other by the p-type or the n-type semiconductor layer of each subcell. Alternatively, the solar cell device further includes a nano-structured region at the p-n junction of at least one subcell, wherein the nano-structured region includes i) a plurality of quantum dots or quantum wells that include InN or InGaN, the quantum dots or quantum wells embedded within a wide band gap matrix that includes InGaN, GaN, or AlGaN, or ii) a plurality of quantum dots or quantum wells that include InAs, GaAs or InGaAs, the quantum dots or quantum wells embedded within a wide band gap matrix that includes InGaP, GaAsP, AlGaAs, AlGaInAs or AlGaInP.
Owner:KOPIN CORPORATION

LED structures for reduced non-radiative sidewall recombination

LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
Owner:APPLE INC

High voltage switching devices and process for forming same

The present invention relates to various switching device structures including Schottky diode (10), P-N diode, and P-I-N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers (16) of low dopant concentration (<1E16 cm−3) grown on a conductive GaN layer (14). The devices enable substantially higher breakdown voltage on hetero-epitaxial substrates (<2 KV) and extremely high breakdown voltage on homo-epitaxial substrates (>2 KV).
Owner:WOLFSPEED INC

Micro-light emitting diode with metal side mirror

Light emitting diodes and display systems are disclosed. In an embodiment a light emitting diode (150) includes a p-n diode (120) including a mesa structure (129) that protrudes from a base structure (131). A reflective metallization (130) laterally surrounds the mesa structure, which also includes a quantum well layer of the p-n diode.
Owner:APPLE INC

Lateral-Diode, Vertical-SCR Hybrid Structure for High-Level ESD Protection

A lateral p-n diode in the center of and surrounded by a vertical Silicon-Controlled Rectifier (SCR) forms an Electro-Static-Discharge (ESD) protection structure. The lateral p-n diode has a cross-shaped P+ diode tap with four rectangles of N+ diode regions in each corner of the cross. A P-well under the P+ diode tap is also an anode of a vertical PNPN SCR that has a deep N-well in a P-substrate. The deep N-well surrounds the lateral diode. Triggering MOS transistors are formed just beyond the four ends of the cross shaped P+ diode tap. Each triggering MOS transistor has N+ regions at the edge of the deep N-well and in the P-substrate that act as the cathode terminals. A deep P+ implant region under the N+ region at the edge of the deep N-well decreases a trigger voltage of the vertical SCR.
Owner:HONG KONG APPLIED SCI & TECH RES INST

Device and method for transient voltage suppressor

ActiveUS20110266592A1Control associated clamping voltageProcess is complicated and expensiveSemiconductor/solid-state device detailsSolid-state devicesFilling materialsTransient voltage suppressor
A transient voltage suppressor (TVS) device includes a semiconductor substrate of a first conductivity type, and a first and a second semiconductor regions of a second conductivity type overlying the semiconductor substrate. A semiconductor layer of the second conductivity type overlies the first and the second semiconductor regions. The TVS device has a first trench extending through the semiconductor layer and the first semiconductor region and into the semiconductor substrate, and a fill material of the second conductivity type disposed in the first trench. A clamping diode in the TVS device has a junction between an out-diffused region from the fill material and a portion of the semiconductor substrate. The TVS device also includes a first P-N diode formed in a first portion of the semiconductor layer, and a second P-N diode having a junction between the second semiconductor region and the semiconductor substrate.
Owner:BCD SHANGHAI MICRO ELECTRONICS CO LTD

Photovoltaic cell comprising an mis-type tunnel diode

A photovoltaic cell comprising a thin semiconductor lamina is described; the lamina is formed by cleaving from a donor wafer while the wafer is bonded to a receiver element which provides mechanical support. Thus fabrication steps performed following cleaving are advantageously performed at temperatures that will not damage the receiver element. By fabricating a cell comprising an MIS-type tunnel diode, rather than a conventional p-n diode, a high-temperature doping step may be avoided.
Owner:GTAT CORPORATION
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