32 results about "Cad tools" patented technology

A system for remotely viewing geometry of an object model generated by a CAD tool hosted on a server computer on a network. The system has an image viewer accessible via a client computer on the network and an image server operatively connected between the image viewer and the CAD tool. The system receives an object model selection, provides the CAD tool with an ICAD application associated with the selection, commands the CAD tool to generate an object model having one or more elements using the ICAD application, displays on the client computer a structure identifying the one or more elements, receives a request to view a selected element, commands the CAD tool to generate an image file describing geometry of the selected element in response to the request, and displays the geometry of the selected element on the client computer in accordance with the image file.

In a computer-aided design environment, a method for ensuring consistency of design rule application among a plurality of CAD tool programs contemplates the use of a global design rule definition file containing one or more global variables each having a specific design rule characteristic assigned thereto. The values of the global variables are passed to CAD tool programs within the environment directly or indirectly through a technology file which contains a subset of the design rules. Each time a CAD tool session is initialized, the current set of design rules are updated through the use of the technology file and the global design rule definition file. Subsequent modifications or changes of the design rules requires only changing the global design rule definition file to ensure synchronization of design rule application among the various CAD tools in the environment.

A system for adding advanced instructions to a microprocessor includes a language for formally capturing the new instructions and a method for generating hardware implementations and software tools for the extended processors. The extension language provides for additions of VLIW instructions, complex load / store instructions, more powerful description styles using functions, more powerful register operands, and a new set of built-in modules. The method is capable of generating fully-pipelined micro-architectural implementations for the new instructions in the form of synthesizable HDL descriptions which can be processed by standard CAD tools. The method is also capable of generating software components for extending software development tools for the microprocessor with new instructions.

A system integration of multicomponent technologies includes an automated microfluidic probe station and the use of that station for the systematic study of nonideal, nonhomogeneous biological fluids such as blood in microfluidic chips. The probe station provides for real-time, non-invasive metrology of microfluidic chips employing optical coherence tomography and optical Doppler tomography to allow for collection of flow data at any location or depth within a microfluidics chip. Also included is a programmable fluidic loader and actuator platform as part of the probe station, and a semi-automated rapid prototyping tool used to fabricate the microfluidic chips measured on the probe station. The resulting data library produced by measurements on the probe station contains all the necessary information needed to develop mature, accurate microfluidic modeling and simulation CAD tools.

A computer-aided design tool for automatically generating a layout for an electronic device to be formed by a set of objects implemented within an integrated circuit, receives input from a user defining a device template specifying shapes, dimensions and relative positions within the layout of the objects forming the device. Some of the object dimensions and / or relative positions are specified as functions of values of input parameters to be supplied by the user. When the user supplies the input parameters, the CAD tool evaluates the functions to determine the object dimensions and / or positions that are functions of the input parameters and then generates a layout for the electronic device wherein object shapes, dimensions and relative positions are as specified in the device template and consistent with the function evaluations. The device template may also include instructions for modifying the layout, for example, indicating that copies of an object are to form an array in the layout, that copies of one object are to fill another object, that an object is to be added to the layout having a shape that is a Boolean function of other objects, and that objects are to be added to or removed from the layout.

Design Data Management uses one copy of common data sets along with a plurality of instances, while continuing to utilize the existing design databases and existing CAD tools. Allowing a minimum amount of user intervention to create and maintain the common data set, Design Data Management employs replicating common data sets into one or more clone data sets. The method preferred provides for replicating and synchronizing one or more data sets with a master data set, comprises providing data design management of a master data set and at least one clone data set, and copying a master physical design data set into one or more physical instances to enable customization of said one or more physical instances. The master data set describes at least one of: a design component, a circuit macro, and a circuit entity, and comprises logical data sets, and it comprise physical design data sets. This permits all existing verification processes that are normally executed against the common data set to also be equally applied to the clones of said data set by way of automatic synchronization between of the common dataset and the clones.

A system for adding advanced instructions to a microprocessor includes a language for formally capturing the new instructions and a method for generating hardware implementations and software tools for the extended processors. The extension language provides for additions of VLIW instructions, complex load / store instructions, more powerful description styles using functions, more powerful register operands, and a new set of built-in modules. The method is capable of generating fully-pipelined micro-architectural implementations for the new instructions in the form of synthesizable HDL descriptions which can be processed by standard CAD tools. The method is also capable of generating software components for extending software development tools for the microprocessor with new instructions.

The present invention relates to a method for highlight and to diagnose regions of interest in biomedical radiographic images, useful in the context of a CAD tool processing operating as second reader during the normal clinical and screening routine, so reducing the costs of management of the “double reading” procedure.

The invention relates to a method for generating an optimized 2D or 3D roller profile curve (5), having a prescribed desired 2D or 3D roller profile curve (5) of a roller profile (5) that changes along a rolled material feed direction (X) and actuating a flexible roller profile device, in which profiling rollers (11) can be adjusted in a computer-controlled manner during a roller profiling process. The method for generating the optimized 2D or 3D roller profile curve comprises the following: a) entering the desired 2D or 3D roller profile curve (5) by means of CAD tools; b) calculating the optimized 2D or 3D roller profile curve (5) from the input and desired 2D or 3D roller profile curve (5) using rounding algorithms, wherein the rounding algorithms round off the 2D or 3D profile curves (5) at a substantially constant curvature, so that the optimized 2D or 3D roller profile curve (5) is generated accordingly, substantially avoiding an uneven curvature; c) confirming or modifying a region of the optimized 2D or 3D roller profile curve (5); and d) saving the optimized 2D or 3D roller profile curve (5).

Design Data Management uses one copy of common data sets along with a plurality of instances, while continuing to utilize the existing design databases and existing CAD tools. Allowing a minimum amount of user intervention to create and maintain the common data set, Design Data Management employs replicating common data sets into one or more clone data sets. The method preferred provides for replicating and synchronizing one or more data sets with a master data set, comprises providing data design management of a master data set and at least one clone data set, and copying a master physical design data set into one or more physical instances to enable customization of said one or more physical instances. The master data set describes at least one of: a design component, a circuit macro, and a circuit entity, and comprises logical data sets, and it comprise physical design data sets. This permits all existing verification processes that are normally executed against the common data set to also be equally applied to the clones of said data set by way of automatic synchronization between of the common dataset and the clones.

A computer-aided design (CAD) tool may identify don't care bits in configuration data. The don't care bits in the configuration data may change polarity without affecting the functionality of the circuit design. The CAD tool may compute an error check code (e.g., parity bits for a two-dimensional parity check) and insert the error check code into the configuration data. As an example, the CAD tool may replace don't care bits in the configuration data with the error code. The configuration data may be stored in configuration memory cells on a programmable integrated circuit, thereby implementing the circuit design with the error code on the programmable integrated circuit. During execution, the programmable integrated circuit may execute error checking and detect and correct errors in the configuration data based on the embedded error code.

A quality validation tool in a form of a computer program, installable on a specific hardware and or workstations which supports industrial CAD tools and PLM tools, the quality validation tool is executable independent of CAD platforms, Non-CAD platforms and or PLM platforms, wherein an engineering information resides in a geometry extractor while a plurality of engineering rules reside in a check validator. The engineering information is encrypted and decrypted. The tool has capability to perform quality audit, while keeping CAD form and detailing unknown to auditor. Validation report with quality rating is generated.

System and method for analyzing design elements in a CAD tool design. A configuration element generator encodes information in a configuration command to generate a configuration element associated with at least one of the design elements. A sequencer, coupled to the configuration element generator, tags the configuration element with a sequence number. A computer memory, coupled to the sequencer, stores the configuration element. A processor, coupled to the computer memory, applies, to the design element that is of interest, each stored said configuration element associated with the design element of interest, in an order indicated by the sequence number. A configuration element is an encoding of data comprising formatted information associated with a design.

The invention relates to a quick density checking method in territory verification, belonging to the field of territory verification in IC CAD tools. Density checking is a figure operation in a design rule checking (DRC) in the IC CAD tool territory verification, and the primary meaning of density checking is to check area percent of a certain layer of figure in the whole zone area; some density checking asks for that area computation is available when a computing layer figure is located in another corresponding figure layer. The description method is as follows: density is available when a computing figure layer is inside of a corresponding figure layer, but in the condition, density is difficult to calculate. The invention provides a density checking and realizing method aiming to the above conditions, so that computational efficiency of density checking with computation layers can be greatly improved.

In transistor layout design, a plurality of distances Lfig1, Lfig2, Lfig3 from a gate electrode of a transistor to the edge of a diffusion layer are displayed by multiple lines according to a variation amount of a transistor characteristic with the use of a CAD tool. A layer for defining an isolation region between adjacent transistors is extended automatically by the CAD tool. Accordingly, even in the case where the transistor characteristic varies depending on the distance from the gate electrode of the transistor to the edge of the diffusion layer, the isolation region between the adjacent transistors can be layouted and designed optimally with no measurement of the distance by designer's visual observation necessitated.

The invention discloses a composite grinding machining feature automatic identification method based on a part engineering image. The method comprises two main body steps of geometric contour extraction and process feature matching. The external features and the internal features are respectively represented by a solid line frame and a dotted line frame, and the geometric contour extraction is divided into two stages, so that the problem of automatic identification of intersection features generally existing in an automatic feature identification technology is solved. The feature geometric contour extraction is based on a boundary tracking algorithm, an effective contour of each feature represented by four angular point pixels is obtained, a CNN classifier is utilized to classify whether internal features exist in a part or not, and finally effective automatic recognition of multiple manufacturing features is sequentially carried out according to geometric information. The method doesnot depend on any CAD tool or data exchange standard, various typical composite grinding machining features can be automatically extracted, high pixel-level precision is guaranteed, and development and application based on the method are lighter and convenient to transplant.

A method of generating a hazard-free representation of a logic circuit that can leverage the powerful and mature synchronous-circuit CAD synthesis tools. In a representative embodiment of the method, an initial representation of a specified asynchronous logic circuit is synthesized using one of such CAD tools. The initial representation is then analyzed to identify hazardous transitions and modified, e.g., by iteratively inserting additional logic aimed at preventing the identified hazardous transitions from producing glitches, until a hazard-free representation of the specified asynchronous logic circuit is produced.

The timing cycles in a circuit design are identified and cut such that timing constraint paths in the circuit design are preserved. Timing cycles in the circuit design may be identified by traversing an adjacency list data structure, in which elements of the circuit design are represented as vertices interconnected by edges. Timing constraint paths may be distinguished from false timing paths using timing analysis, such as a greatest common path heuristic. Timing constraint paths may be marked as “constrained” to prevent these paths from being cut. With the cycles and timing constraint paths identified, cuts may be selected that cut the identified timing cycles while preserving the timing constraint paths. The cycle cuts allow the circuit design to be correctly processed within a conventional CAD tool design flow.

A method for designing a system on a target device is disclosed. A first plurality of components in the system are assigned to be placed by an computer aided design (CAD) tool based on a criterion. A second plurality of components in the system are assigned to be placed by a hardware placement unit based on the criterion. Placement results from the CAD tool and the hardware placement unit are used to generate a placement solution for the system on the target device. Other embodiments are described and claimed.

The invention belongs to the technical field of aircraft assembly process file compilation. The invention discloses a method for quickly compiling an aircraft assembly process file. The method includes the steps: integrating CAD software provided with a customized CAD tool with a CAPP system, using a customized CAD tool to extract three-dimensional model information of a product, enabling the three-dimensional model information to form an XML process text according to a standard process parameter format, then importing the XML process text into a CAPP system, and achieving transmission and interaction of the process information. According to the method, manual extraction of the three-dimensional model information of the product from CAD software can be omitted, and automatic import of theextracted three-dimensional model information of the product can be realized, so that the compiling efficiency and quality of the assembly file are effectively improved.

A method for enforcing a contract for a computer-aided-design (CAD) tool is provided. In this method, a first payment for the CAD tool is made in accordance with the contract. The first payment is associated with user access to the CAD tool. At this point, the CAD tool can be used, wherein the computer system running the CAD tool includes criteria for requesting at least one additional payment for the CAD tool. Each additional payment is associated with generating an output. The computer system is responsive to one or more trigger conditions corresponding to the criteria. A payment request is received when an output generated by the CAD tool satisfies a trigger condition. For example, one trigger condition adds a watermark to the output for identifying the output as having been produced by the CAD tool.

A mechanical design reuse method includes having a CAD tool replicates a subset of a first modeling representation of a first mechanical design, in response to having received instructions that identify a subpart of the first mechanical design. The reuse method further includes having the CAD tool merges the replicated subset into a second modeling representation of a second mechanical design to effectuate the reuse of the identified subpart of the first mechanical design in the second mechanical design. In one embodiment, the modeling representations are dependent graphs, and the subsets being replicated and merged are sub-graphs of the dependent graphs. The dependent graphs and sub-graphs include nodes directly associated with the subparts of the designs, nodes on which the directly associated nodes are dependent, and arcs linking the nodes together in accordance with their dependency on each other. In one embodiment, the replicate and merging process also provides for a designer the option to transform certain design variables having constant values assigned to become design variables eligible to have their values variably assigned, and vice versa.

The invention discloses an approximate calculation circuit reliability evaluation method based on signal probability, comprising: inputting a circuit netlist file, analyzing the circuit netlist file, extracting circuit connection structure information according to the content of the netlist file; A CAD tool that obtains the signal probabilities of all input terminals in the circuit and the probability of different input combinations of each gate; initializes the probability and reliability of the original input signal of the circuit; calculates each gate based on the probability of the original input signal The reliability of the original output terminal; calculating the corresponding circuit reliability of each input combination and adding the circuit reliability obtained by each input combination to obtain the average value to obtain the reliability of the entire circuit. The method of the invention has the advantages of short time consumption, wide application range and high evaluation result accuracy when evaluating the reliability of the approximate circuit.

The invention discloses 3D printing resin for manufacturing a low-loss antenna and application of the 3D printing resin. The 3D printing material comprises a light-cured resin prepolymer, a photoinitiator, a reactive diluent, a dispersing agent, a laser-activatable metal compound and low-loss polymer powder. The preparation method of the material comprises the following steps: preparing the light-cured resin base material; doping a low dielectric loss material; doping a catalyst capable of being activated by laser; and performing defoaming treatment. The processing method of the low-loss antenna comprises the following steps: 1, constructing an antenna model by using a CAD tool; 2, carrying out antenna matrix 3D printing by using the prepared light-cured resin material; 3, conducting laser activation; and 5, metalizing the conductive circuit of the antenna. According to the functional 3D printing material for manufacturing the low-loss antenna, the capability of manufacturing electronic circuit products through 3D printing is greatly improved, and the functional 3D printing material can be applied to the fields of aerospace, 5G communication, intelligent automobiles and the like.

The invention belongs to the technical field of CAD software test interfaces, and particularly provides a three-dimensional CAD software automatic test interface design method and system.The method comprises the steps that S1, on the basis of contrasting and analyzing a secondary development interface of existing foreign mainstream three-dimensional CAD software, object and behavior concepts are introduced to abstract a standard test interface, and a standard test interface is obtained; a unified test interface API is manufactured in a DLL import mode; wherein each unified test interface API is used for executing a certain specific behavior of a certain specific object; and S2, calling a functional module of the three-dimensional CAD software to be tested through the unified test interface API for testing. According to the scheme, a set of universal test interface specifications of the three-dimensional CAD is summarized on the basis of the common function characteristics of all the three-dimensional CAD tools, and a foundation is laid for achieving normalization of the automatic test operation process of all the three-dimensional CAD tools, completing driving of different three-dimensional CAD systems through a unified test case for automatic testing and generating of the same test result.

The invention belongs to the technical field of three-dimensional CAD software testing, and particularly provides a three-dimensional CAD software testing method and system based on a unified test case script, and the method comprises the steps: S1, starting an automatic testing function through a button or a menu, and calling an entry function of the unified test case script through a C + + integrated Python interface to achieve automatic testing; s2, the unified test case script calls a unified standard test API interface of the three-dimensional CAD software through a Python integration C + + component interface technology; wherein each test case has an entry function, and an automatic test function is completed; by running the same test case on different three-dimensional CAD software, the same model and performance data test results are output, and conditions are provided for comparability tests of the three-dimensional CAD software. The model modeling process is automatically completed through one-button operation, and the process that a user must click and move a mouse in a canvas area provided by a three-dimensional CAD tool to conduct graph / model drawing is omitted.

The invention discloses a method for achieving automatic PDK testing, and belongs to the field of PDK designing and testing in IC CAD tools. According to the method, batch production and batch testing of PDK units are achieved through a program. Corresponding circuit diagrams, corresponding edition diagrams and a large number of PDK units containing different parameters can be automatically generated by reading parameter combinations, set in a configuration file, of PDK library names, cell names, paths and units. DRC and LVS verification can be carried out in a batched mode, and the validity of technical documents, Symbol, CDF, Callback, parameterization units, physics validation rules and Spice Model can be effectively verified. According to the method, the generating process and the testing process of tested units, settling of testing results and selection of different testing steps of a user are defined in the program.