47results about "Resist coating" patented technology

A method of fabricating a printed circuit board is disclosed. A method of fabricating a printed circuit board that includes: stacking an insulation layer on at least one surface of a core layer, on which an inner circuit is formed, and forming an outer circuit pattern; burying the outer circuit pattern in the insulation layer; removing the outer circuit pattern to form minute grooves and curing the insulation layer; and forming an outer circuit by filling metal in the minute grooves, makes it possible to readily form high-resolution fine-line circuits, as well as to reduce fabrication costs and increase productivity.

As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or / and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on the surface conductive layer before forming the second resin layer. Moreover, there is provided a circuit board having a hole with a small positional shift and high precision.

A component for semiconductor package which has a protective insulating layer on at least one surface of a component body and exposes a conductive material of the component body to an opening part of the protective insulating layer is manufactured by a method including the steps of (a) forming a mask on at least one surface of the component body, (b) forming the protective insulating layer by filling an opening part of the mask with a protective insulating material by a molding method using a metal mold comprising a mold release film, and (c) removing the metal mold and removing the mask. A typical component is a lead frame or a substrate for semiconductor package.

A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.

A method of fabricating a printed circuit board is disclosed. A method of fabricating a printed circuit board that includes: stacking an insulation layer on at least one surface of a core layer, on which an inner circuit is formed, and forming an outer circuit pattern; burying the outer circuit pattern in the insulation layer; removing the outer circuit pattern to form minute grooves and curing the insulation layer; and forming an outer circuit by filling metal in the minute grooves, makes it possible to readily form high-resolution fine-line circuits, as well as to reduce fabrication costs and increase productivity.

Provided is a process for forming metallized vias in a substrate including the steps of (I) applying to an electroconductive substrate an electrodepositable coating composition onto all exposed surfaces of the substrate to form a conformal dielectric coating; (II) ablating a surface of the dielectric coating to expose a section of the substrate; (III) applying a layer of metal to all surfaces to form metallized vias in the substrate. Also disclosed are processes for fabricating a circuit assembly which include the application of an electrodoepositable coating composition onto exposed surfaces of the substrate / core to form a conformal dielectric coating thereon. The electrodepositable coating composition includes a resinous phase dispersed in an aqueous phase, where the resinous phase has a covalently bonded halogen content of at least 1 percent by weight. The dielectric coating derived therefrom has a low dielectric constant and low dielectric loss factor.

A method for manufacturing a structure containing a conductor circuit according to the present invention can provide openings in various shapes by patterning a first photosensitive resin layer in a first patterning process according to shapes of openings formed in a heat-curable resin layer. Further, in the method for manufacturing a structure containing a conductor circuit, a plurality of openings can be formed at the same time and a residue of the resin around the opening can be reduced, unlike a case in which openings are formed with a laser. Therefore, it is possible to sufficiently efficiently manufacture the structure having excellent reliability even when the number of pins of a semiconductor element increases and it is necessary to provide a great number of fine openings.

The present subject matter relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.

A PCB solder masking process allowing easier process, reduced production cost and improved PCB quality involves dispensing low hardness resin on contacts to be exposed on the PCB, resin being solidified, non-solidified area covered with mask, UV exposed, non-solidified area removed, PCB sprayed insulation varnish, solidified, varnish and resin on surface of contact removed, either sanded or sandblasted, and finally cleaned and rinsed.

A method of producing a multilayer interconnection board is disclosed that includes the steps of processing a resin member on an interconnection layer by imprinting press, and removing residue of the resin member at the bottom of a via hole after forming the via hole. In the method of producing a multilayer interconnection board, a thermal setting resin, which has a setting temperature higher than that of the resin member, is applied on a via-connecting portion of the interconnection layer, the resin member is formed on the interconnection layer, an interconnection groove and a via hole are formed by imprinting press on the resin member by using a tool, and an un-cured portion of the high temperature setting resin is dissolved and removed by using a resin solvent. Thereby, residue of the resin member on the thermal setting resin is removed.

As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or / and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on the surface conductive layer before forming the second resin layer. Moreover, there is provided a circuit board having a hole with a small positional shift and high precision.

A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.

A microelectronic interposer is made by providing a sacrificial layer over the surface of a planar body. Apertures are formed passing through the body and the sacrificial layer. A layer of an electrically conductive structural material is deposited in each of the apertures and over the sacrificial layer, proximate to each aperture to thereby form contacts. The sacrificial layer is removed leaving the contacts with outwardly flaring peripheral portions spaced vertically above the surface of the planar body.