217 results about "Equivalent input" patented technology

A touchpad input controller receives user input relating to a display. The input controller includes a facing surface that faces a user when the controller is held in the user's hand or hands during use, and one or more non-facing surfaces that each faces away from the user when the controller is held the user's hand or hands during use. At least one non-facing surface includes a touchpad input area that is positioned to be accessed by at least one user finger for receiving user input. The facing surface including a display on which the results of user input received at the touchpad input area is displayed. The touchpad input area includes a mapping to a virtual keyboard layout for receiving keyboard-equivalent input from the user at the touchpad input area.

The present invention proposes an ESD protection circuit with low input capacitance, suitable for an I / O pad. The ESD protection circuit includes a plurality of diodes and a power-rail ESD clamp circuit between power lines. The diodes are stacked and coupled between a first power line and the I / O pad. The ESD protection circuit between power lines is coupled between the first power line and a second power line. During normal operation, the diodes are reverse-biased and the ESD protection circuit between power lines is turned off. When an ESD event between the power line and the I / O pad occurs, the diodes are forward-biased, and the ESD protection circuit between power lines is turned on to conduct ESD current. The equivalent input capacitance of the ESD protection circuit of the present invention is very small, making it particularly suitable for the I / O port of high-frequency or high-speed IC.

Queries are optimized according to a first optimization mode by generating execution plans and selecting the lowest cost plan. Inputs optimized according to the first optimization mode, to database operations with input parameters that are inconsistent with the first optimization mode, are replaced with equivalent inputs optimized according to a second optimization mode, the second optimization mode being consistent with the input parameter. Blocking operations are eliminated from queries using a cost-based approach.

A transimpedance amplifier, which is useful as an optical fiber preamplifier, is disclosed. The illustrative embodiment exhibits four characteristics. First, it minimizes the equivalent input noise current. Second, it has a wide bandwidth. Third, it has a reasonably large output voltage, and fourth, it is stable over wide temperature and voltage ranges. The illustrative embodiment comprises a transimpedance stage and a gain stage. Both stages employ a pure NMOS design which contributes to the above four advantages. Bandwidth is further increased over the prior art by the use of inductive loads. The inductive loads of the illustrative embodiment are not physical inductors, but transistor-based “active” inductors: the combination of a resistor connected in series with the gate of an NMOS transistor.

The invention discloses a method for grouping wind generating sets, which takes the input wind speed and the random fluctuation of wind direction of a wind farm into consideration as well as wake effect among the wind generating sets, and then provides the method for grouping the wind generating sets by using the correlation coefficients of the wind generating sets. The technical scheme of the method is as follows: considering the wake effects among the wind generating sets and then determining the input wind speeds of the wind generating sets; studying the influence of wind direction change on the input wind speed of the wind generating set; calculating the correlation coefficients of the wind generating sets in each wind speed and wind direction intervals of the wind farm so as to obtain a three-dimensional correlation coefficient matrix; and in each wind speed interval under a same wind direction, arranging the wind generating sets with the same correlation coefficients into a group so as to complete the process of grouping the wind generating sets. The method overcomes the influences of the actions (grouping the wind generating sets without considering the influences of the wind speed and wind direction changes and the wake effects between the wind generating sets or only according to one of the factors above) on wind generating set grouping; and by using the method of the invention, the grouping situation of the wind generating sets can be inquired easily when the wind speed and the wind direction change, and the equivalent input wind speed of each wind generating set can be calculated so as to build a stochastic model of the wind farm and then determine the output power of the wind farm; the output characteristics of the wind farm connected to the grid and the influence on the operation characteristics of the grid are studied, and accurate wind power data can be provided for the electric network management departments.

The invention discloses a digital variable gain amplifier, which utilizes a differential input end switch of an MOS (Metal Oxide Semiconductor) transistor and an MOS transistor diode positive / negative feedback switch to control the network and change equivalent input transconductance and the scale amplification factor of a current mirror so as to realize the function of digital variable gain amplification. The digital variable gain amplifier mainly comprises three parts of a differential input stage transconductance control network, a diode positive / negative feedback control network of the MOS transistor and an output load stage. The invention has the characteristics of stable direct current working point, less chip area, high gain control precision, large and relatively stable broadband,flexible gain control mode, novel thinking, simple circuit structure and the like corresponding to the traditional digital variable gain amplifier.

The invention discloses high-speed high-precision comparator circuit design. According to the design, a first-level regenerative amplifying circuit and a second-level positive feedback latching circuit are included. According to a comparator, by using the regenerative circuit in a first-level pre-amplifying process, the amplitude of a first-level output signal of the comparator reaches a degree capable of being recognized by a second positive feedback latching level in a shorter time, the speed of the comparator is increased, and therefore the comparator can be applied to a high-speed ADC (analog-digital converter). According to the second positive feedback latching level, two inverters are adopted to isolate the first level and the second level of the comparator, gain of the first-level regenerative amplifying circuit is improved, and equivalent input offset voltage of the comparator is lowered. Besides, compared with a second-order dynamic comparator adopted in the ADC, the load driving capability of the comparator is higher, and delay is more insensitive to changing of an input signal difference.

Receiving an object color signal and an input black colorant quantity associated with the object color signal, an equivalent output black colorant quantity calculating section calculates an equivalent output black colorant quantity in an output color space equivalent to the input black colorant quantity from the input black colorant quantity. An output color signal determining section calculates an output color signal from the object color signal and the equivalent input black colorant quantity, and determines whether or not the coverage restriction is satisfied. When the coverage restriction is not satisfied, an optimum black colorant quantity is calculated by adjusting the input black colorant quantity, and an optimum color signal satisfying the coverage restriction is calculated to generate an output color signal with the optimum black colorant quantity in the restriction black colorant quantity calculating section and subsequent processings.

The invention discloses a wien-bridge chaotic oscillator based on a firs-order generalized memory resistor. The wien-bridge chaotic oscillator based on a firs-order generalized memory resistor comprises a capacitor C1, a capacitor C2, a capacitor C3, a inductor L, a resistor R1, a resistor R2, a resistor R3, a resistor R4, an operational amplifier U1, and the memory resistor M comprised of a diode bridge cascade RC filter; wherein, the memory resistor M comprised of the diode bridge cascade RC filter comprises a diode D1, a diode D2, a diode D3, a diode D4, a resistor R0, and a capacitor C0. The wien-bridge chaotic oscillator based on a firs-order generalized memory resistor according to the invention is simple in structure, and through regulating reference values of elements of the circuit, the wien-bridge chaotic oscillator can exhibit different chaotic characteristics and obtain a chaotic behavior with complex dynamic characteristics. The memory resistor equivalent circuit according to the invention has no limitation of being grounded, i.e. the equivalent input end requires no ground processing and enables to be connected in series into the existing oscillating circuit. The dynamic characteristics of the memory resistor chaotic circuit according to the invention do not depend on the initial state, and the complex nonlinear physical phenomenon is avoided effectively.

The PLC according to this invention includes I / O modules, a CPU module, an input / output bus, and a PC having a display. The CPU module includes a control program storage unit which previously stores an intrinsic control program in which operation processing and an input / output information item are packaged; a library which previously stores the function block representing the operation processing; and a header file which previously stores equivalent input / output information equivalently representing the input / output information by a graphical language. Referring to the library and header file, PC causes the execution program created and stored in the main storage unit to be displayed on the display by the function block and equivalent input / output information item.

The invention provides a method for estimating load and mutual inductance of a wireless charging system. The method comprises the following steps of A, performing rising edge zero-crossing detection on inverter output voltage, voltage of parallel capacitors in an original side compensating circuit, and input current of a wireless energy transmitting coil, and obtaining rising side zero-crossing time in one period; B, acquiring the working frequency of a wireless charging system, measuring inductance and capacitance in the original side compensating circuit, self-inductance values of the original side and the secondary side of the wireless energy transmitting coil, and calculating a reflection complex impedance of the secondary circuit; C, acquiring a functional relation between an equivalent input complex impedance of the secondary compensating circuit and the load; D, estimating the load by means of the reflection complex impedance of the secondary circuit and the functional relation between the equivalent input complex impedance of the secondary compensating circuit and the load; and E, estimating the mutual inductance by means of the reflection complex impedance of the secondary circuit, the functional relation between the equivalent input complex impedance of the secondary compensating circuit and the load, and the estimated value of the load.

A system and method for using loop topology identification to investigate a transmission line having a plurality of cable segments. At a measurement plane for each segment, a probing signal is transmitted into the cable. A reflected signal is detected, and an equivalent total input impedance is calculated. The system iteratively calculates the distance between the measurement planes as well as the length, characteristic impedance, and the propagation constant of each segment. A model is used to calculate the respective equivalent input impedance of each segment using the calculated characteristic impedance, propagation constant, and length of the preceding segment. The equivalent total input impedance is then calculated from the iteratively calculated segment values.

A method for performing verification includes importing a design netlist containing one or more components and computing one or more output functions for the one or more components. One or more output equivalent state sets are generated from the one or more output functions and one or more next-state functions for the one or more components are identified. One or more image equivalent state sets for the one or more next-state functions are produced and one or more output-and-image equivalent state sets are classified for the one or more image equivalent state sets and the one or more output equivalent state sets. One or more input representatives of the one or more equivalent input sets are selected and an input map is formed from the one or more input representatives. The input map is synthesized and injected back into the netlist to generate a modified netlist.

The invention discloses a design method of a scanning unit based on partial scanning of an improved test vector set, relating to the technical field of SOC (system-on-a-chip) test of digital integrated circuits, and solving the problems of delayed test, hardware redundancy and large required capacity of a memory in the conventional online test method. The method comprises the following steps of: firstly, obtaining an important equivalent output pin which is important to fault detection by stimulating a fault of an equivalent output pin in a combined part of a sequence circuit; secondly, obtaining the improved test vector set by stimulating a fault of an equivalent input pin in the combined part of the sequence circuit; and finally, according to the improved test vector set and an equivalent output pin which is unimportant to the fault detection, dividing triggers into fixed-input triggers and important triggers, and serially connecting the important triggers to form a partial scanningchain. By the method, the obtained scanning unit has a relatively high fault coverage rate and can reduce the hardware redundancy of a test circuit, the digit of bits of the test vector and the memory space.

The invention discloses a dynamic equivalence method for large-scale photovoltaic power station grid connection, and belongs to the technical field of electric system control. The method comprises the steps of firstly, calculating the equivalent and uniform input illumination intensity of each grid-connected photovoltaic power generation unit under the non-uniform illumination condition, then, grouping the grid-connected photovoltaic power generation units according to the equivalent and uniform input illumination intensity, aggregating the grid-connected photovoltaic power generation units in the same group into one grid-connected power generation equivalence unit, and finally calculating the equivalent input illumination intensity of each equivalence unit. According to the dynamic equivalence method for large-scale photovoltaic power station grid connection, the dynamic equivalence problem of the large-scale photovoltaic power station grid connection is solved, the number of orders of a model is remarkably reduced, the simulation time is shortened, and meanwhile the influence of a photovoltaic power station on a system can be correctly reflected.

The invention discloses a current comparator, comprising a current difference stage, a gain stage and an output stage, wherein the current difference stage is a cascode current mirror, a current inputend is connected with an MOS transistor with short circuited gate and drain, so that the equivalent input impedance of the current comparator is reduced, and the comparison speed can be improved; thegain stage introduces a common source amplifier of a current source load with feedback, a current source bias voltage is generated by a high threshold voltage tube, so that the bias tube current canbe reduced, and the power consumption is reduced; and the output stage introduces a self-biased differential amplifier, so that the driving capability of the output comparator can be obviously improved. Theoretical analysis and simulation results indicate that the current comparator disclosed by the invention has the characteristics of high precision and high driving capability.

The invention belongs to the technical field of amplifiers, and particularly relates to a current feedback chopper modulation instrument amplifier working under a micro quiescent current. The amplifier consists of a blocking condenser, a current feedback chopper amplifier, an N-bit mismatch compensation capacitor array, a ripple canceling circuit, a biasing circuit and a clock frequency dividing circuit. The microcurrent and current feedback chopper modulation instrument amplifier has the characteristics of alternating current coupling, high input impedance, ultra-low offset voltage, low noise, high common mode rejection ratio, high power supply rejection ratio, micro-power consumption and the like; the circuit is particularly suitable for a wearable health monitoring system biopotential acquisition circuit adopting dry electrodes, and can eliminate semi-potential imbalance between electrodes in a rail-to-rail mode. The simulation result of one embodiment of the invention shows that the common-mode rejection ratio of the instrument amplifier is greater than 120 dB, the equivalent input impedance is greater than 500 M Ohm, and the noise energy efficiency factor NEF is equal to 4.5.

The invention provides a tactical missile robust attitude control method based on perturbation estimation and compensation. Nondeterminacy, perturbation and model nonlinear terms acting on a system are all regarded as equivalent input perturbation applied to an input channel, then real-time estimation and compensation are conducted on the perturbation by designing a linear generalized extended state observer, so that the nondeterminacy and perturbation acting on the system are reduced, and then the effect that a controller meets the requirements various performance indexes such as tracking performance, limiting control amount and robust stability of the closed-loop system can be designed through a robust control method. According to the tactical missile robust attitude control method, a precise system model and prior information about perturbation are not needed, the available total state of the system is not required, and high applicability is achieved. The tactical missile robust attitude control method is suitable for the field of aircraft attitude control.

A method includes forming a plurality of test patches in an array of orthogonal rows. The test patches are formed by using at least one printhead in an imaging machine. Each of the test patches is associated with a respective one of a plurality of initial input color values. The array of test patches includes a plurality of rows of varied-input test patches and at least one row of first equivalent-input test patches. A respective output color value of each of the test patches is measured. At least one first mathematical relationship is generated based on the output color values of the at least one row of first equivalent-input test patches. A plurality of adjusted input color values are calculated for respective ones of the varied-input test patches. Each adjusted input color value is calculated based upon the generated at least one first mathematical relationship. A second mathematical relationship is computed between the adjusted input color values and the output color values. The imaging machine is calibrated by using the second mathematical relationship.

The invention discloses a common-gate input type low-power-consumption trans-impedance amplifier and belongs to the field of integrated circuits. The amplifier is a differential input / output structure and comprises common-gate input levels, load levels and feedback levels. Radio frequency differential signals V<in+ / -> are input through the source ends of the common-gate input levels, are converted into signal currents, are further converted into voltage signals at the load levels and finally form output differential signals V<out+ / ->. The output voltage signals are sampled by the feedback levels and are fed back to the source ends of the common-gate input levels, thereby improving equivalent input transconductance. The common-gate input levels adopt capacitor cross-coupling modes, so that the equivalent input transconductance is further improved. According to the trans-impedance amplifier, the high-performance trans-impedance amplifier can be realized with relatively low power consumption.

A transimpedance amplifier, which is useful as an optical fiber preamplifier, is disclosed. The illustrative embodiment exhibits four characteristics. First, it minimizes the equivalent input noise current. Second, it has a wide bandwidth. Third, it has a reasonably large output voltage, and fourth, it is stable over wide temperature and voltage ranges. The illustrative embodiment comprises a transimpedance stage and a gain stage. Both stages employ a pure NMOS design which contributes to the above four advantages. Bandwidth is further increased over the prior art by the use of inductive loads. The inductive loads of the illustrative embodiment are not physical inductors, but transistor-based “active” inductors: the combination of a resistor connected in series with the gate of an NMOS transistor.

The invention discloses an on-line monitoring method for switching resistance of a switch machine. The method comprises the following steps: establishing a switch machine equivalent input and output model: calculating various losses by using an electrical energy flow analysis method and by combining effect of power supply cable resistance of a switch machine drive motor on the operating energy flow of the drive motor, extracting output torque of the drive motor, establishing a set model parameter value; isolating and sampling the three-phase voltage and three-phase current of the switch machine drive motor by a voltage transformer and a current transformer, outputting to a switching force monitoring module for operation to obtain a mean square value of current and active power, and outputting to a turnout collection slave; collecting the input current and a power curve by the turnout collection slave according to the turnout state, calculating a switching force curve of the switch machine according to the set model parameter, and realizing display, storage and alarming of the curve by reporting the switching force curve to a microcomputer for monitoring with CAN communication. The method has the advantages of realizing the timely, accurate and practical railway turnout monitoring and maintenance.

A method for performing verification includes importing a design netlist containing one or more components and computing one or more output functions for the one or more components. One or more output equivalent state sets are generated from the one or more output functions and one or more next-state functions for the one or more components are identified. One or more image equivalent state sets for the one or more next-state functions are produced and one or more output-and-image equivalent state sets are classified for the one or more image equivalent state sets and the one or more output equivalent state sets. One or more input representatives of the one or more equivalent input sets are selected and an input map is formed from the one or more input representatives. The input map is synthesized and injected back into the netlist to generate a modified netlist.

The invention discloses a wind farm dynamic equivalent modeling method suitable for long-time domain wind speed fluctuation, which adopts quantum particle swarm optimization to optimize fuzzy C-mean clustering algorithm for clustering, A wind turbine generator set of the same group is equivalent to a wind turbine generator set (called equivalent wind turbine generator set), and the equivalent input wind speed of the equivalent wind turbine set is real-time equivalent, and the parameters of the wind turbine set are identified, and then the wind farm power collection system is equivalent, so that the wind farm dynamic equivalent model suitable for long-time wind speed fluctuation is obtained. The invention comprehensively considers the variation characteristics of wind speed of the wind farm with time, adopts the quantum particle swarm optimization fuzzy C with high clustering accuracy and strong global optimization searching ability, and adopts the quantum particle swarm optimization fuzzy C, Mean value clustering can obtain the wind farm dynamic equivalent model which can accurately reflect the external characteristics of the real wind farm.

The embodiment of the invention discloses an underactuated mechanical arm layering sliding mode control method based on fuzzy optimization. The method comprises the steps that a plane two-freedom-degree active-passive (AP) underactuated mechanical arm dynamical model is set up, a nonlinear coupling dynamical model is simplified into an affine nonlinear system, and two joint angles are adopted as control targets; then, layering sliding mode controllers are designed, a subsystem is formed by the angle and the angular speed of each joint, the equivalent input of the two subsystems is solved, a sliding mode main switching surface is constructed through a Lyapunov feedback function, and the control rate is obtained; and finally, a fuzzy rule is designed to dynamically optimizing the switching robust item in the sliding mode control rate, and the buffeting problem existing in a previous control system is solved. Compared with other plane two-freedom-degree AP mechanical arm control methods,by means of the technical scheme, the steady-state time of the control process can be reduced, and the control precision can be improved.

The invention discloses a low-temperature infrared detector feeble current amplifier by differential input. The amplifier adopts a folded common-source and common-gate structure by differential input; a 41MOhm feedback resistor is integrated in a chip; a four-path integrated amplifier chip has the specification of only 3mmx1.9mm; the amplifier can directly convert a current signal of the infrared detector into a voltage signal and can normally operate at the normal temperature of 300 K and low temperature of 77 K; the amplifier can be not only used for amplifying an infrared detector signal but also used for amplifying a visible light detector signal; the 3dB bandwidth of the amplifier is 5KHz under the low temperature of 77K; the equivalent input current noise is 0.025PA / HZ<1 / 2> at 1KHz; and the minimal unit power can be lowered to 0.32mW.

The invention discloses a novel low-complexity broadband variable gain amplifier. The novel low-complexity broadband variable gain amplifier comprises an active load circuit, a current source circuit, a differential input circuit, a gm-boost circuit and a gain control circuit. The active load circuit is respectively connected with the gm-boost circuit and the differential input circuit; and the current source circuit is respectively connected with the differential input circuit, the gm-boost circuit and the gain control circuit. The novel low-complexity broadband variable gain amplifier can realize a dB linear relationship of input and output without an index generation circuit, efficiently enhances equivalent input transconductance of VGA through the gm-boost circuit, enables the VGA to have relatively high linearity and a relatively wide dB linearity range, and also greatly expands the broadband of the VGA under the precondition of not adding the VGA power consumption through the active load circuit. The novel low-complexity broadband variable gain amplifier can be widely applied to an amplifier product.

The invention discloses a wind power plant grid-connection stability analysis method considering dynamic characteristics of a permanent magnet directly-driven wind turbine generator. The wind power plant grid-connection stability analysis method comprises the steps of S1, building a simplified dynamic model of a PMSG (Permanent Magnet Synchronous Generator) type wind power plant grid-connection system, and acquiring equivalent output impedance of the PMSG type wind power plant grid-connection system; S2, acquiring equivalent input impedance at a grid side of the PMSG type wind power plant grid-connection system by using a Thevenin equivalent method; S3, calculating an output and input impedance ratio Tm of the PMSG type wind power plant grid-connection system; and S4, judging the stability of the PMSG grid-connection system by using an output and input impedance ratio stability analysis principle. From the aspect of frequency domain stability, the wind power plant grid-connection stability analysis method considers main relevant factors of dynamic characteristics of a PMSG, puts forwards a concept of the output and input impedance ratio Tm of the wind power grid-connection system, constructs a specific expression formula of the indicator, and ingeniously uses an Nyquist curve of the output and input impedance ratio Tm to judge the grid-connection stability of the system.

The invention relates to a source impedance stable network, which is used as a standard load for transmitting electromagnetic interference measurement. Compared with the conventional source impedance stable network, the source impedance stable network is characterized in that a 50-ohm standard load is removed from the source impedance stable network and is replaced by a coupling circuit of which the equivalent input impedance is 50 ohms. The improved source impedance stable network does not measure the electromagnetic interference of a live wire or a zero line independently, but proceeds from the definitions of common-mode interference and differential mode interference, uses the coupling circuit to obtain the common-mode interference and the differential mode interference at the same time on the basis of detecting interference signals of the live wire and the zero line at the same time. The source impedance stable network can be widely applied to measurements of various conduction electromagnetic interferences.

The present invention provide circuits, methods, and apparatus directed to an integrated circuit having a memory interface that is configurable to have one of a multiple different bus widths. The memory interface has a first set of lines and a second set of lines. The first and second set of lines are arranged such that there are multiple locations at which a via may be placed to connect a line of the first set to a line of the second set. The placement of the vias determines the bus width of the memory interface.