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247results about How to "Write quickly" patented technology

Dual clocked synchronous memory device having a delay time register and method of operating same

A synchronous memory device having at least one memory section which includes a plurality of memory cells. The memory device comprises a register to store a value which is representative of a delay time after which the memory device responds to a read request and clock receiver circuitry to receive first and second external clock signals. The memory device also includes an output driver(s) to output data on a bus, in response to a read request and in accordance with the delay time, wherein a first portion of the data is output synchronously with respect to the first external clock signal and a second portion of the data is output synchronously with respect to the second external clock signal. The memory device may include a delay locked loop to generate internal clock signal(s) using the external clock signal(s). The output drivers output data on the bus in response to the internal clock signal(s). The memory device may include input receiver circuitry, coupled to the bus, the receive the read request, wherein the read request is sampled from the bus synchronously with respect to the first external clock signal.
Owner:RAMBUS INC

Permanent low cost radio frequency compressor identification

A sealed compressor assembly has a compressor and a housing enclosing the compressor. The housing for the compressor has a receiver and a memory unit. The receiver receives a first signal, which is stored on a memory unit on the housing.
Owner:SCROLL TECH

Semiconductor memory device

A semiconductor memory device comprises a array of memory cells arranged in a matrix, each memory cell connected to one end of a variable resistor element where the electric resistance is shifted from the first state to the second state by applying the first writing voltage and from the second state to the first state by applying the second writing voltage, and the source or drain of the selecting transistor. The second writing time for the second writing action of shifting the electric resistance of the variable resistor element from the second state to the first state is longer than the first writing time of shifting the same reversely. The second number of the memory cells subjected to the second writing action at once is greater than the first memory cell number subjected to the first writing action at once, and at least the second number is two or more.
Owner:SHARP KK

Continuous data protection method

The invention provides a continuous data protection method. Data can be recovered to any time point; data mounting in a short time can be realized; and the fast verification, write-in and immediate use of the data are realized. The method comprises the following steps that: initialization synchronization is executed at first; the initial state of production host block equipment is synchronized to a backup host; meanwhile, a data variation capturing module is started for capturing the data variation and transmitting the data variation to the backup host; the data variation is written into a mirrored volume; original data of a data variation address is written into a journal volume; the timestamp, the offset, the length and the storage address are recorded; and the recording of any data variation is realized. The reconfiguration of a virtual volume is used; the actual data access is redirected to the mirrored volume, the journal volume and a write time volume through a virtual volume index block; and the data read-out and the data write-in are realized. The data recovery is realized by using data read-out. Obsolete data can be deleted only through finding and deleting all of the journal volume and journal volume metadata files with the ending timestamp before the time point.
Owner:成都云祺科技有限公司

Data reading and writing-in methods and systems of shared memory

The invention provides data reading and writing-in methods and systems of shared memory. The data reading method comprises the steps as follows: positioning the location of the shared memory where to-be-read data is located; obtaining the length of the to-be-read data; obtaining a read offset pointer pRead and a write offset pointer pWrite in the shared memory; judging whether the to-be-read data is readable according to the read offset pointer pRead and the write offset pointer pWrite as well as the length of the to-be-read data; and if yes, reading the to-be-read data from the location of the shared memory where the to-be-read data is located. With the adoption of the invention, the problem of blockage caused by locking is solved, so that the resource consumption is reduced, the system resource is sufficiently utilized, the processing speed is increased, and the server throughput is improved.
Owner:BEIJING QIANXIN TECH

Laser direct-writing device

The invention relates to a laser direct-writing device; the laser direct-writing device is firstly characterized by comprising an inscribing light source, a out-of-focus detection module, a spectrum spectroscope, a focusing PZT (Piezoelectric Transducer), an object lens, a two-dimensional XY motor platform, a Y-axis correcting platform, a sample to be inscribed, a laser interferometer, a master controller and a shockproof platform, wherein a combined structure of the large-stroke two-dimensional XY motor platform and the small-stroke Y-axis correcting platform is adopted as a sample displacement platform; laser direct-writing device is secondly characterized in that the laser interferometer is used for measuring the change of the distance between the X-axis and the Y-axis, and the synchronization of the movement of the X-axis and the laser pulse as well as the accurate correction of the Y-axis during the moving process of the X-axis can be simultaneously realized by using the position pulse signal emitted from the laser interferometer. The laser direct-writing device can realize quick high-precision inscribing within a large range, thereby being capable of inscribing micro-nano graphs and structures in any shape within a large range and having relatively higher practical value.
Owner:SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI

Message queue based write and read method and system of shared memory

The invention discloses a message queue based write and read method and system of a shared memory. The write method of the shared memory comprises the steps as follows: the message queue is adopted to execute the operation of multi-threaded in-queue push and single-threaded out-queue pop; and data of the single-threaded out-queue pop is written in the shared memory. With the adoption of the message queue based write and read method and system of the shared memory, the problem of blockage during communication between threads is solved, the resource consumption is reduced, system resources are sufficiently used, and the processing speed is increased, so that the throughput capacity of a server is improved.
Owner:BEIJING QIANXIN TECH

Read-write method and system for database

The embodiment of the invention discloses a read-write method and system for a database. The method comprises the steps of: transversely cutting record data according to a main keyword into a plurality of data segments, wherein each data segment is stored as a write copy and corresponding read copies, and the write copy is stored in form of line storage, so that the write performance of the database is optimized; the read copies are stored in form of column storage, and data in each read copy is organized in different manners, so that the read performance of the database is optimized. According to the method, an overall index and a local index are further established, so that the operating position of data to be written or to be read can be quickly positioned when data is written or read. According to the embodiment of the method or system, not only is data quickly written, but also data can be quickly read.
Owner:SHANGHAI SHENGPAY E PAYMENT SERVICE CO LTD

Semiconductor memory device

InactiveUS20070285972A1Minimize write timeDuration of timeDigital storageEngineeringSemiconductor
A semiconductor memory device comprises a array of memory cells arranged in a matrix, each memory cell connected to one end of a variable resistor element where the electric resistance is shifted from the first state to the second state by applying the first writing voltage and from the second state to the first state by applying the second writing voltage, and the source or drain of the selecting transistor. The second writing time for the second writing action of shifting the electric resistance of the variable resistor element from the second state to the first state is longer than the first writing time of shifting the same reversely. The second number of the memory cells subjected to the second writing action at once is greater than the first memory cell number subjected to the first writing action at once, and at least the second number is two or more.
Owner:SHARP KK

Server debugging framework using scripts

A debugging framework that exposes debug data in a standardized rowset format such that a relational database engine may be utilized to analyze the data. Conventional high-level scripting languages may be used to generate scripts for reuse and in extracting the debug data. An OLE-DB provider facilitates the query and analysis of debugging information through the database engine.
Owner:MICROSOFT TECH LICENSING LLC

Real-time bus passenger analysis system and construction method thereof

The invention discloses a construction method of a real-time bus passenger analysis system. The construction method includes the steps: performing pretreatment analysis for historical bus data according to data processing rules and historical data analysis of bi-directional bus card swiping passengers based on a Spark cloud computing platform; acquiring getting off behaviors of various stations of the passengers by the aid of historical data of bi-directional getting on behaviors of the passengers, and constructing getting on and getting off station distribution of bus passengers of routes by a statistic learning method; acquiring a data analysis computing method of passenger density of intervals by the aid of the getting on behaviors of the passengers; pre-processing bus data in real time by the aid of Spark, and dynamically generating bus station lists by the aid of bus stop records; feeding back background data processing results to foregrounds in real time by the aid of Spark Streaming technology, and reading and writing dynamic bus data at high speed by the aid of Redis; and analyzing the bus data in real time, and computing passenger density according to analysis results of the historical data.
Owner:杭州讯阳科技有限公司

Data processing method of next-generation sequencing (NGS) data analysis platform (IMP)

The invention discloses a data processing method of a next-generation sequencing (NGS) data analysis platform (IMP). The next-generation sequencing data analysis platform implements an entire next-generation sequencing processing process as a single step from inputting of short-reading long-sequences of an FASTQ file format to outputting of mutation detection of a standard VCF file format; at thesame time, the method also provides an option of outputting an intermediate result of sequence alignment in a standard SAM or BAM format; longer data searching and loading time required for I / O accessing of hard drives and SSDs can be avoided through massive memory accessing without using slow I / O to exchange data; hash table writing or reading, deletion of duplicated alignment records and mutation detection are all enabled to be faster; quick next-generation sequencing data analysis can be realized on the premise of not impacting analysis quality; and compared with speeds of existing schemes,a speed of the method is increased up to 20 times.
Owner:厦门极元科技有限公司

Method and system for improving write performance in a supplemental directory

According to one embodiment, a method of processing an update operation in a directory system having a reference layer having directory functionality and a supplemental layer operative intermediate the reference layer and a user is provided. The supplemental layer comprises a non-persistent store. The method includes receiving the update operation the update operation having an associated attribute and determining whether the attribute associated with the update operation is stored in the non-persistent store.
Owner:CA TECH INC

Pixel compensating circuit and driving method thereof, display panel and display apparatus

The invention discloses a pixel compensating circuit and a driving method thereof, a display panel and a display apparatus. The pixel compensating circuit comprises a control module, a write-in module, a driving module, a light-emitting module and a resetting module; data signals of a data signal terminal are transmitted to the driving module through the write-in module under the control of a scanning signal terminal, and signals of a reference voltage signal terminal are transmitted to the control module; the control module transmits signals of a first power supply terminal to the driving module under the control of a power supply control signal terminal; and the control module controls the driving module to perform discharging for threshold compensation under the common effect of a switch-on control signal terminal and the power supply control signal terminal to write a threshold voltage of a driving transistor in the driving module. According to the system, the pixel compensating circuit is charged by employing the signals of the first power supply terminal so that the threshold voltage of the driving transistor can be rapidly written in, the compensation charging time is reduced, and the stability of light-emitting display is improved; and the light-emitting module is reset through the resetting module so that the problem of reduced performance and service lifetime can be improved.
Owner:HEFEI BOE OPTOELECTRONICS TECH +1

Disk control system and method

In a disk control system having a RAID controller for continuously writing data on a data stripe composed of a plurality disk apparatus, in response to a write request, data blocks are sequentially written on empty areas of a write target data stripe on the plurality of disks in such a manner that at least one data block is written at a time. Further, in response to the write request, logical addresses having address values prior to address translation are written on logical address log areas on the plurality of disks, as logical-address log information. An upper file system is notified that the write has been completed after the data and the logical-address log information have been completely written.
Owner:KK TOSHIBA

Data-storage apparatus, data-storage method and recording/reproducing system

A data-storage apparatus, a data-storage method and a recording / reproducing system are provided, which effectively use the time elapsing before data is transferred to be written in a recording medium, such as disc-seeking time and disc-rotation standby time, thereby to raise the speed of transferring data. A hybrid storage apparatus has two storage areas, i.e., a disc and a nonvolatile solid-state memory. The disc and the memory have a disc cache area, a system area, and a user area each. If data is transferred from the host apparatus, it is written into the cache area of the nonvolatile solid-state memory that can be accessed at high speed for the first super cluster. While the data being so written, the head is moved to a prescribed position. Any data coming after the head is moved to this position is written into the cache area.
Owner:SONY CORP

RFID tag circuits operable at different speeds

Embodiments of RFID tag circuits and methods are described, which include a chip having a clock circuit operable to generate a clock signal having different frequencies, and one or more components operable to work at the different frequencies. In addition to a regular frequency, at least one higher frequency is possible, which is enabled in situations where a reader is known to be close to the chip. The proximity ensures that the chip generates reliably more power, which enables its operation at the higher speed.
Owner:IMPINJ

Product packaging including digital data

Light sensitive materials applied in shipping materials, including security seals and tear tape, for authentication, discrimination and recognition of items.
Owner:VERIFICATION TECH INC

Data reading-writing method and device based on index sorting

The invention discloses a data reading-writing method and device based on index sorting. The method comprises the following steps of: receiving a data reading-writing request; according to a keyword carried in the data reading-writing request, matching a micro-cluster index table; obtaining a micro-cluster index corresponding to data to be written in; according to reading-writing time information carried in the data reading-writing request, obtaining secondary index address identification ID (identity) information corresponding to the reading-writing time information from the obtained micro-cluster index; according to the obtained secondary index address identification ID information, addressing a corresponding secondary index; obtaining the data block address ID of reading-writing data; and according to the obtained data block address ID, inverting the reading-writing data in the time sequence. When the invention is applied, the kernel resource consumption of the reading-writing data can be lowered.
Owner:TENCENT TECH (BEIJING) CO LTD

Procedure invocation in an integrated computing environment having both compiled and interpreted code segments

Software code sections can include at least one calling procedure (110) and a called procedure (140). The called procedure can include an interpreted code body (144). Execution of the interpreted code body can require the use of an associated interpreter. The software code sections can also include prologue (142) associated with the called procedure. The prologue can be invoked by the at least one calling procedure and can responsively actuate the interpreted code body causing programmatic actions defined within the interpreted code body to execute. Execution of the prologue does not require use of an interpreter. In one embodiment, the interpreted code body of the called procedure can execute upon a platform having an application binary interface (115). The prologue can actuate the interpreted code body according to specifications of the application binary interface.
Owner:GOOGLE TECH HLDG LLC

Laser cathode ray tube

A Laser-CRT is described in which the laser faceplate is at high potential and the cathode is above ground. The cathodes can be modulated in a dual-drive or push-pull mode in which each of the dual video amplifiers is required to swing only half of the total required voltage, thereby writing smaller pixels faster and achieving higher resolution. Another described embodiment provides a substantially constant laser output over time, and an approximately uniform output intensity over an area. A constant-output Laser-CRT can be used to illuminate a spatial light modulator (SLM) in a projection system, and since video modulation is not required in that embodiment, neither are costly electronics and merely a voltage bias need be applied to the electron gun (e.g., the K electrode) to turn on the electron beam.
Owner:PRINCIPIA LIGHTWORKS

SSD (Solid State Drive) data migration method and device

ActiveCN106527988AImprove accelerationImprove response time and access rateInput/output to record carriersData migrationCache hit rate
The embodiment of the invention discloses an SSD (Solid State Drive) data migration method and device, wherein the method comprises the following steps of: establishing a caching queue and a pre-caching queue, and arranging objects corresponding to the access popularities of data blocks in corresponding queues; according to the cache hit ratio of cached data, adjusting the improvement spans of levels of the various objects, and then, updating the pre-caching queue; and, judging whether the current levels of the various objects in the updated pre-caching queue are up to the pre-set levels or not, and, writing the corresponding data blocks in a cache after the current levels of the objects are up to the pre-set levels. By means of the technical scheme provided by the invention, when hotspot data is changed, the good acceleration effect is provided; and the system response time and the access rate are increased. The embodiment of the invention further provides the corresponding implementation device; therefore, the method has relatively high practicability; and the device has corresponding advantages.
Owner:ZHENGZHOU YUNHAI INFORMATION TECH CO LTD

Spin Hall effect-assisted writing multi-state magnetic random access memory bit and spin Hall effect-assisted writing method

The invention relates to a spin Hall effect-assisted writing multi-state magnetic random access memory bit and a spin Hall effect-assisted writing method. The memory bit comprises a multi-state memory unit composed of two magnetic tunnel junctions, a spin Hall effect metal layer connected to a free layer of one of the magnetic tunnel junctions and a switch circuit composed of a word line, a bit line and a switching device. The multi-state magnetic random access memory composed of the spin Hall effect auxiliary bits has the magnetic random access memory (MRAM) advantages of fast reading speed, unlimited number of erasures, low energy consumption and radiation resistance, realizes polymorphic signal writing through spin Hall effect assistance, records 3 or 4 bits of information in the memory unit, effectively improves data storage density and reduces a chip area. The spin Hall effect can effectively reduce the writing current threshold and reduce the writing power consumption.
Owner:CETHIK GRP

Procedure invocation in an integrated computing environment having both compiled and interpreted code segments

Software code sections can include at least one calling procedure (110) and a called procedure (140). The called procedure can include an interpreted code body (144). Execution of the interpreted code body can require the use of an associated interpreter. The software code sections can also include prologue (142) associated with the called procedure. The prologue can be invoked by the at least one calling procedure and can responsively actuate the interpreted code body causing programmatic actions defined within the interpreted code body to execute. Execution of the prologue does not require use of an interpreter. In one embodiment, the interpreted code body of the called procedure can execute upon a platform having an application binary interface (115). The prologue can actuate the interpreted code body according to specifications of the application binary interface.
Owner:GOOGLE TECH HLDG LLC

Method and device for writing data in non-volatile memory

The invention discloses a method and a device for writing data in a non-volatile memory. The method comprises the following steps of: backing up all data of a memory cell at an address of data to be written-in in a data region to a data buffer region in a random access memory (RAM) when determining that data is to be written in the data region of the non-volatile memory during execution of an operating instruction; backing up original data at the address of the data to be written-in in the data region to a backup buffer region in the RAM and recording address information of the original data, which is backed up, in the data region in the backup buffer region; writing the data to be written in at a corresponding position of the data buffer region according to the address of the data to be written-in in the data region; and writing the data in the data buffer region back to the data region and clearing the backup buffer region when determining that the execution of the operating instruction is finished. By the method and the device, the data is quickly written in the non-volatile memory, write-in frequency of the non-volatile memory is reduced, program running speed is increased and service life of the non-volatile memory is prolonged.
Owner:BEIJING WATCH DATA SYST

Big data-based identification method and system for objects with similar traces

The invention belongs to the field of data analysis, and relates to a big data-based identification method and system for objects with similar traces. A spatial normalization module, a data arrangement module, a spatial point position sequence generation module, a behavior trace sequence extraction module, a behavior matrix generation module and a behavior matrix calculation module are connected in sequence, and a trace identifier dictionary is constructed for original trace position data; the data is introduced in a standardized manner according to the trace identifier dictionary; trace pointposition data belonging to objects is integrated; trace point position sequences of the objects in a time window are constructed; displacement trace sequences are generated for the trace point position sequences of the objects; a behavior calculation matrix is constructed for calculating trace similarity; and results with behavior similarity meeting the condition are output. By obtaining and analyzing spatial position moving information of different objects and calculating the similarity between spatial position changes of the different objects by utilizing an algorithm, a similarity relationship between the objects is explored, and the objects and groups with similar behaviors are identified and searched for.
Owner:YANTAI HAIYI SOFTWARE

Solid-state memory device and method for arrangement of solid-state memory cells

A high-capacity magnetic memory device in which the magnetic field for writing is nearly uniform for all memory elements. It is realized by reducing the deformation of resist pattern which occurs in photolithography when mask patterns are close to each other. The magnetic memory device is an MRAM composed of a large number of memory cells, each including one TMR element, one transistor for reading (selection), and reading plugs that connect the TMR element to the transistor for reading (selection). These memory cells are arranged such that the TMR elements are in a pattern of translational symmetry. For writing, memory cells are connected by the bit lines and the writing word lines which intersect orthogonally. The long axis of the TMR element is oriented aslant 45° with respect to these lines, so that the TMR elements are capable of toggle-mode writing.
Owner:SONY CORP

Method for generating business rule expression and computing device

The invention provides a method for generating a business rule expression and a computing device. The method comprises the following steps of displaying an index item and / or a rule composition symbolcapable of forming a business rule to a user; receiving a selection of the user on the displayed index item and / or the displayed rule composition; displaying the index item and / or the rule compositionsymbol selected by the user in the rule editing area; and according to an editing operation executed by the user in the rule editing area, at least carrying out editing processing on the displayed index items and / or rule composites to obtain the business rule expression. According to the method for generating the business rule expression and the computing device, which are disclosed by the embodiment of the invention, a user with relatively weaker code compiling capability can quickly and accurately compile the desired business rule expression, so that the processing efficiency of a data application rule can be improved.
Owner:THE FOURTH PARADIGM BEIJING TECH CO LTD

Floating gate type field effect transistor memory and manufacturing method thereof

The invention relates to a floating gate type field effect transistor memory with a rapid data erasing and writing function and a manufacturing method thereof, which belong to the technical field of memories. In the prior art, the aspect of improving the erasing and writing effects of memories is mostly not very obvious. According to the memory provided by the invention, a silicon wafer with a silicon oxide layer is used as a substrate, the memory sequentially comprises few layers of graphene serving as a floating gate layer, hexagonal boron nitride serving as an insulating layer and novel two-dimensional materials (platinum disulfide and rhenium disulfide) serving as a channel layer from the substrate to the top, and further comprises a source electrode and a drain electrode which are formed on the channel layer by utilizing an evaporation process, and while rapid writing of the data is realized, rapid erasing of the memory data is also realized.
Owner:HUAZHONG UNIV OF SCI & TECH

Warehouse management method and system

The invention provides a warehouse management method and system, and relates to the technical field of warehouse management. The warehouse management system comprises a server, material RFID electronic tags and a reader, wherein each material is provided with the material RFID electronic tag, the reader is used for updating the currently stored warehouse information in the material RFID electronictags according to an operating instruction, and the server is used for updating preset warehouse information according to the updated warehouse information. According to the warehouse management method and system provided by the embodiment of the invention, fast read-in of material and shelf information is realized by using an RFID technology. Meanwhile, an RFID system is enabled to be accessed to the server, so that the difficulty of warehouse management is simplified, and the efficiency of warehouse management is improved.
Owner:AEROSPACE INFORMATION
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