Spin Hall effect-assisted writing multi-state magnetic random access memory bit and spin Hall effect-assisted writing method

A technology of random access memory and spin Hall effect, applied in the field of non-volatile memory and semiconductor, can solve the problems of adverse effects of chip speed and stability, unfavorable practical application, high manufacturing cost, and achieve fast reading speed. , The effect of reducing write power consumption and improving data storage density

Inactive Publication Date: 2017-12-15
CETHIK GRP
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0002] The current multi-state MRAM memory is mainly based on the STT effect, thermal assistance, magnetic field assistance and other means to achieve data writing, and the related operations are relatively complicated, which has an adverse effect on the speed and stability of the chip, and the manufacturing cost is also high, which is not conducive to the actual situation. application

Method used

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  • Spin Hall effect-assisted writing multi-state magnetic random access memory bit and spin Hall effect-assisted writing method
  • Spin Hall effect-assisted writing multi-state magnetic random access memory bit and spin Hall effect-assisted writing method
  • Spin Hall effect-assisted writing multi-state magnetic random access memory bit and spin Hall effect-assisted writing method

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Embodiment 1

[0023] Example 1: figure 1 , figure 2 The reference signs of are: free magnetic layer FL, pinned magnetic layer PL, insulating layer IL, magnetic tunnel junction MTJ; image 3 with Figure 4 Reference numerals are: word line WL, bit line BL, source line SL, magnetic tunnel junction MTJ, CMOS transistor.

[0024] This embodiment is a spin Hall effect assisted STT-MRAM multi-state memory cell with a double bit line structure. In this embodiment, the basic structure of the multi-state memory cell assisted by the spin Hall effect of the double bit line structure is as follows image 3 As shown, it includes a word line WL, two bit lines BL1 and BL2, a source line SL, an in-plane multi-state magnetic storage bit, and a memory cell selection switch composed of CMOS transistors. Among them, the structure of the in-plane multi-state magnetic storage bit is as follows figure 1 , figure 2 As shown, it includes an in-plane magnetic tunnel junction MTJ1 and an in-plane magnetic tun...

Embodiment 2

[0029] Embodiment 2: This embodiment is a spin Hall effect assisted STT-MRAM multi-state memory cell with a double CMOS transistor structure. In this embodiment, the basic structure of the STT-MRAM multi-state memory cell assisted by the spin Hall effect of the dual CMOS transistor structure is as follows Figure 4 As shown, it includes a bit line BL, an in-plane multi-state magnetic storage bit, a memory cell selection switch composed of two CMOS transistors, its source lines SL1 and SL2, and word lines WL1 and WL2. Among them, the structure of the in-plane multi-state magnetic storage bit is as follows figure 1 , figure 2 As shown, it includes an in-plane magnetic tunnel junction MTJ1 and an in-plane magnetic tunnel junction MTJ2, and each MTJ is composed of a free magnetic layer FL, a pinned magnetic layer PL, and an insulating layer IL. Among them, the magnetization directions of the magnetic layers of MTJ1 and MTJ2 are located in the film plane, and the positions of th...

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Abstract

The invention relates to a spin Hall effect-assisted writing multi-state magnetic random access memory bit and a spin Hall effect-assisted writing method. The memory bit comprises a multi-state memory unit composed of two magnetic tunnel junctions, a spin Hall effect metal layer connected to a free layer of one of the magnetic tunnel junctions and a switch circuit composed of a word line, a bit line and a switching device. The multi-state magnetic random access memory composed of the spin Hall effect auxiliary bits has the magnetic random access memory (MRAM) advantages of fast reading speed, unlimited number of erasures, low energy consumption and radiation resistance, realizes polymorphic signal writing through spin Hall effect assistance, records 3 or 4 bits of information in the memory unit, effectively improves data storage density and reduces a chip area. The spin Hall effect can effectively reduce the writing current threshold and reduce the writing power consumption.

Description

technical field [0001] The invention relates to the fields of nonvolatile memory and semiconductor, in particular to a multi-state magnetic random access memory bit and a spin Hall effect assisted writing method. Background technique [0002] The current multi-state MRAM memory is mainly based on the STT effect, thermal assistance, magnetic field assistance and other means to achieve data writing, and the related operations are relatively complicated, which has an adverse effect on the speed and stability of the chip, and the manufacturing cost is also high, which is not conducive to the actual situation. application. Contents of the invention [0003] In order to overcome the above disadvantages, the present invention aims to provide a multi-state magnetic random access memory bit with spin Hall effect assisted writing, and adopts a double magnetic tunnel junction as a multi-state magnetic memory for information storage bit , the memory not only has the advantages of fas...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/16G11C11/18
CPCG11C11/161G11C11/1675G11C11/18
Inventor 李辉辉孟皓蒋信刘少鹏戴强刘波
Owner CETHIK GRP
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