Pixel compensating circuit and driving method thereof, display panel and display apparatus
A compensation circuit and pixel technology, applied to static indicators, instruments, etc., can solve problems such as long charging time, insufficient threshold compensation, and small charging current
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Embodiment 1
[0081] by Figure 2b The structure of the pixel compensation circuit shown is taken as an example, and the corresponding circuit timing diagram is as follows Figure 4a shown. Specifically, choose the Figure 4a There are three stages in the timing diagram shown: reset stage T1 , threshold compensation stage T2 and light emitting stage T3 .
[0082] In the reset phase T1, SCAN=0, SC=1, SW=0, SN=0. Since SCAN=0, both the third switch transistor M3 and the fourth switch transistor M4 are turned on. The turned-on third switch transistor M3 inputs the data signal of the data signal terminal DATA into the control electrode of the driving transistor M0, so that the voltage of the control electrode of the driving transistor M0 is the voltage V of the data signal. data . The turned-on fourth switching transistor M4 transmits the signal of the reference voltage signal terminal VREF to the second terminal of the storage capacitor Cst, so that the voltage of the second terminal of t...
Embodiment 2
[0087] by Figure 3a The structure of the pixel compensation circuit shown as an example, Figure 3a The pixel compensation circuit shown is in the Figure 2b On the basis of the pixel compensation circuit shown, the signal of the scanning signal terminal SCAN is used to control the second switching transistor M2, and the second switching transistor M2 is an N-type transistor, and the third switching transistor M3 and the fourth switching transistor M4 are both P-type Transistor, its corresponding circuit timing diagram is as follows Figure 4b shown. Specifically, choose the Figure 4bThere are three stages in the timing diagram shown: reset stage T1 , threshold compensation stage T2 and light emitting stage T3 .
[0088] In the reset phase T1, SCAN=0, SW=0, SN=0. In this stage, since SCAN=0, the second switching transistor M2 is turned off. The rest of the working process in this stage is basically the same as the working process in the reset stage T1 in the first embo...
Embodiment 3
[0092] by Figure 3b The structure of the pixel compensation circuit shown as an example, Figure 3b The pixel compensation circuit shown is in the Figure 3a On the basis of the pixel compensation circuit shown, the second switch transistor M2 is a P-type transistor, the third switch transistor M3 and the fourth switch transistor M4 are both N-type transistors, and the corresponding circuit timing diagram is as follows Figure 4c shown. Specifically, choose the Figure 4c There are three stages in the timing diagram shown: reset stage T1 , threshold compensation stage T2 and light emitting stage T3 .
[0093] In the reset phase T1, SCAN=1, SW=0, SN=0. In this stage, since SCAN=1, both the third switch transistor M3 and the fourth switch transistor M4 are turned on, and the second switch transistor M2 is turned off. The rest of the working process in this stage is basically the same as the working process in the reset stage T1 in the first embodiment, and will not be desc...
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