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110results about How to "Reduce the number of cells" patented technology

Handover measurement control method for mobile communication system

InactiveCN102307370AReduce the number of cellsLighten the measurement burdenWireless communicationRadio networksHandover
The invention discloses a handover measurement control method for a mobile communication system. In the method, by virtue of architectural characteristic of a TD-SCDMA (Time Division-Synchronous Code Division Multiple Access) system, RNCs (Radio Network Controllers) can carry out information interaction via an Iur interface or a core network (CN) and maintain a neighboring cell information list in real time; and according to the maintained neighboring cell information list, the RNCs only configure the cells with light load, small interference and good link quality in the neighboring cell information list in a measurement control message issued to UE (User Equipment), while the cells with severe or worse information are not used as measuring objects of the UE so as to prevent the cells with insufficient available resource, too big interference or poor communication link quality from being used as the measuring objects, which decreases number of the cells measured by the UE, reduces measuring burden of the UE, lowers time cost during the measuring process, realizes prior optimization for a measuring object list of the UE to a certain degree and reduces trial times during the handover process so as to reduce handover delay and drop call rate during the handover process and improve handover success rate.
Owner:SOUTH CHINA UNIV OF TECH

Method of reducing disturbs in non-volatile memory

In a non-volatile memory, the displacement current generated in non-selected word lines that results when the voltage levels on an array's bit lines are changed can result in disturbs. Techniques for reducing these currents are presented. In a first aspect, the number of cells being simultaneously programmed on a word line is reduced. In a non-volatile memory where an array of memory cells is composed of a number of units, and the units are combined into planes that share common word lines, the simultaneous programming of units within the same plane is avoided. Multiple units may be programmed in parallel, but these are arranged to be in separate planes. This is done by selecting the number of units to be programmed in parallel and their order such that all the units programmed together are from distinct planes, by comparing the units to be programmed to see if any are from the same plane, or a combination of these. In a second, complementary aspect, the rate at which the voltage levels on the bit lines are changed is adjustable. By monitoring the frequency of disturbs, or based upon the device's application, the rate at which the bit line drivers change the bit line voltage can be adjusted. This can be implemented by setting the rate externally, or by the controller based upon device performance and the amount of data error being generated.
Owner:SANDISK TECH LLC
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