249results about How to "Reduce count" patented technology

The invention of this application relates generally to intravenous (IV) infusion of drugs to patients, and more particularly to aspects of an IV infusion system comprising an infusate cassette and an infusate container. The present invention provides a drug infusion cassette that incorporates a strong vial spike that may be non-metal, a means for sheathing the spike when it is not in use, an anti-free flow device, and other beneficial features such as an air entrainment lockout mechanism, quality assurance tags, stopcocks made of soft materials and means of securing tubing to the cassette with a minimum of individual parts. The drug cassette can be used with an automated spiking mechanism comprising a motorized vial holder that holds a vial. The spike remains sheathed if the drug cassette is not fully engaged with a mating surface of devices such as a pumping unit or a sedation and analgesia delivery system.

A microscopic optical structure controller for providing singular control of individual microscopic optical structures of a microelectromechanical optical device by a multiplexed stream of individual pixel values generated by a pixel value source. The microscopic optical structure controller includes at least one interconnect coupled to the pixel value source for receiving the multiplexed stream of individual pixel values and at least one mapper communicating with the interconnect for extracting individual pixel values from the multiplexed stream and applying the individual pixel values to one or more individual microscopic optical structures according to a configurable mapping. A method and a driver for providing singular control of individual microscopic optical structures of a microelectromechanical optical device are also disclosed.

A novel and useful apparatus for and method of a unified IO controller well suited for use in integrated wireless devices incorporating multiple functions. The unified IO controller is operative to provide a single host interface PHY / MAC that is shared among all functions on the controller. The invention provides an IO protocol handler comprising common and unified logic that provides IO access to any function on the device. The common and unified IO PHY interface logic is shared between multiple functions within the same device (e.g., WLAN, GPS, Bluetooth, etc.). This implementation provides optimized hardware partitioning in which common SDIO logic serves multiple functions thereby eliminating the need to provide a protocol handler for each function, reducing pin count, power consumption and die size, since the SDIO protocol handling is implemented in a shared module.

A modular support assembly receives and / or stores elongated objects that may be primarily cylindrical in shape, such as fluid conduits including hydraulic tube, pipe and hose. The modular support assembly includes a plurality of interchangeable modules of differing or similar sizes to create an adjustable assembly whose overall shape and number of modules can change depending upon the intended use of the assembly. The modules comprise sliding engagement portions that are disposed along a periphery of the modules and allow interengageable attachment to other modules. The modules also comprise apertures that can vary in size to accommodate various sizes of objects. The modules can be disassembled by sliding module portion halves apart, facilitating easy assemblage of the modules either before or after the objects retained therein have been positioned, and subsequent removal of individual objects from the assemblage.

The present invention includes techniques for programming and verifying data in a programmable circuit. Programmable circuits such as PLDs may include a plurality of rows and columns of memory cells. Data is programmed into memory elements associated with the rows and columns. Subsequently, the programmed data may be extracted for verification. A first word line may be selected by first word line address bits in row shift registers. Data programmed into the first word line is loaded into column shift registers for verification during one or more verify steps. During a program step, data is programmed into memory elements in a second word line that is selected by the first word line address bits. The present invention also provides a technique for shifting program data bits into the column shift registers at the same time that verify data bits are shifted out of the column shift registers.

A rasterizer stage configured to implement multiple interpolators for graphics pipeline. The rasterizer stage includes a plurality of simultaneously operable low precision interpolators for computing a first set of pixel parameters for pixels of a geometric primitive and a plurality of simultaneously operable high precision interpolators for computing a second set of pixel parameters for pixels of the geometric primitive. The rasterizer stage also includes an output mechanism coupled to the interpolators for routing computed pixel parameters into a memory array. Parameters may be programmably assigned to the interpolators and the results thereof may be programmably assigned to portions of a pixel packet.

A method for fracturing or mask data preparation or proximity effect correction is disclosed which comprises the steps of inputting patterns to be formed on a surface, a subset of the patterns being slightly different variations of each other and selecting a set of characters some of which are complex characters to be used to form the number of patterns, and reducing shot count or total write time by use of a character varying technique. A system for fracturing or mask data preparation or proximity effect correction is also disclosed.

A self-contained radio frequency (RF) wireless communication device (100) comprising an explosion-proof housing (110), an internal electronic system for the conversion of radio wave and conducted electrical signals, and an internal antenna system located within a non-metallic portion (130) of the housing for collecting and emitting radio wave energy. The antenna system enables the wireless communication device (100) to safely collect and emit radio wave energy using one or more optimally configured antenna resonators (351), with each antenna resonator differing each other antenna resonator by at least one attribute in a group of attributes comprising: frequency response, field polarization, and wavelength spatial diversity.The present invention is a self-contained RF wireless communication device that provides data communications between two or more devices for the supervisory control and / or data acquisition of actuators, sensors, transducers, gas detectors, and other devices located in explosive hazardous locations without the need of installing one or more external antennas, one or more antenna connectors, excessive conduit connections and seals, and the like, whereby reducing system installation components count and eliminating conduit connections, furthermore reducing the probability of system-level failures caused by lower-level faults of components and conduit connections, resulting in a less expensive and safer electrical equipment installation.

The present invention provides compositions including at least two siderophore receptor polypeptides and at least two porins from a gram negative microbe, and preferably, lipopolysaccharide at a concentration of no greater than about 10.0 endotoxin units per milliliter. The present invention also provides methods of makino and methods of using such compositions.

The present invention provides methods for treating an animal for low milk production. The methods include administering compositions including siderophore receptor polypeptides and porins from gram negative microbes, and preferably, lipopolysaccarhide at a concentration of no greater than about 10.0 endotoxin units per milliliter.

A multiple channel programmable gamma correction voltage generator including a resistor ladder, buffers, select logic, and a programmable non-volatile memory device. The memory provides select values indicative of one or more stored gamma correction values. The resistor ladder includes adjustable tap resistors distributed along the resistor ladder. The adjustable tap resistors provide multiple tap voltages distributed according to the gamma correction value. The buffers receive the tap voltages and provide gamma correction voltages. The select logic selects tap points of the adjustable tap resistors to select the tap voltages based on the select values stored in the memory. Additional resistors and switch logic may be included to enable re-positioning of the adjustable tap resistor within the resistor ladder. Latches and address control may be provided on the memory to enable programming and selection of multiple gamma correction values.

Switching-mode power conversion system and method thereof. The system includes a primary winding configured to receive an input voltage, an a secondary winding coupled to the primary winding and configured to, with one or more first components, generate, at an output terminal, an output voltage and an output current. Additionally, the system includes an auxiliary winding coupled to the secondary winding and configured to, with one or more second components, generate, at a first terminal, a detected voltage. Moreover, the system includes an error amplifier configured to receive the detected voltage and a first reference voltage and generate an amplified voltage based on at least information associated with a difference between the detected voltage and the first reference voltage. Also, the system includes a compensation component configured to receive the amplified voltage and generate a second reference voltage based on at least information associated with the amplified voltage.