The invention discloses a vertical parasitic PNP transistor in the silicon-germanium BICMOS technique. A groove which is in contact with a base region is formed in a shallow trench field oxide around the base region, the depth of the groove is smaller than or equal to the depth of the base region, polycrystalline silicon is filled in the groove and doped with N-type dopant, the polycrystalline silicon doped with the N-type dopant is formed into an outer base region, which is in contact with the side of the base region, and a metal contact is formed on the outer base region, and leads out a base. The invention also discloses a fabrication method for the vertical parasitic PNP transistor in the silicon-germanium BICMOS technique. The vertical parasitic PNP transistor can be used as an output device in a high-speed, high-gain HBT (heterojunction bipolar transistor) circuit, so that one more type of device is provided as an option for the circuit, the area of the device can be effectively reduced, the parasitic effect of the device can be effectively decreased, the collector resistance of the PNP transistor can be effectively decreased, and the performance of the device can be effectively enhanced; and the method does not need additional process conditions, and can reduce the production cost.