34 results about "Negative cycle" patented technology

A CMOS implemented passive mixer circuit for improving linearity performance in wireless communication systems is described, including dual pairs of NMOS FETs and dual pairs of PMOS FETs. Each NMOS FET is connected in parallel with a corresponding PMOS FET. A local oscillator signal is provided to the gate of one FET while a 180-degree phase shifted local oscillator signal is provided to the gate of its complementary FET. Because the complementary FETs are driven by local oscillator signals that are 180 degrees out of phase, the NMOS FET is turned on for at least a portion of the positive cycle of the local oscillator signal and the PMOS FET is turned on for at least a portion of the negative cycle of the 180-degree phase shifted local oscillator signal. Distortion in the mixed output signal is thereby reduced.

A voltage generating circuit that drives multiple output terminals in alternating positive and negative cycles has two resistor ladders, one resistor ladder generating voltages for the positive cycles, the other resistor ladder generating voltages for the negative cycles. Single-ended amplifiers are connected directly to the resistor ladders, and a switching circuit connects each output terminal to a selectable one of the amplifiers. The output terminals may be precharged to opposite potentials at the beginning of positive and negative cycles, and the resistor ladders may include switching elements that initially set all generated voltages to these potentials so that the amplifiers start each cycle with equal input and output levels, reducing overshoot and undershoot. This voltage generating circuit saves space and power in driving, for example, a display panel in a mobile telephone.

A voltage generating circuit that drives multiple output terminals in alternating positive and negative cycles has two resistor ladders, one resistor ladder generating voltages for the positive cycles, the other resistor ladder generating voltages for the negative cycles. Single-ended amplifiers are connected directly to the resistor ladders, and a switching circuit connects each output terminal to a selectable one of the amplifiers. The output terminals may be precharged to opposite potentials at the beginning of positive and negative cycles, and the resistor ladders may include switching elements that initially set all generated voltages to these potentials so that the amplifiers start each cycle with equal input and output levels, reducing overshoot and undershoot. This voltage generating circuit saves space and power in driving, for example, a display panel in a mobile telephone.

A method for verifying the performance of a real-time system modeled as a timed automaton. An abstract model of the system is checked against an initial Linear Temporal Logic specification. If a path to an undesirable state is found, the counterexample is validated or invalidated using negative cycle detection. If a negative cycle is detected, optimization is undertaken to identify a minimal infeasible fragment in the negative cycle. The specification is then refined to eliminate usage of the minimal infeasible fragment, and the abstract model is then checked against the refined specification.

A method and apparatus is for providing a phantom battery feed to reduce power consumption in a differential amplifier circuit. A voltage signal is driven onto a telecommunications line using a first amplifier and a second amplifier. A phantom battery feed is performed during a negative cycle of the voltage signal. Performing the phantom battery feed comprises: supplying a negative supply terminal of the first amplifier with a supply voltage that is one-half of a full scale supply voltage; and supplying a positive supply terminal of the second amplifier with a supply voltage that is one-half of the full scale supply voltage.

A calibration method for a slice level of zero cross signal and a method of producing zero cross signal are disclosed. In this invention, the positive cycle and the negative cycle of the zero cross signal are sampled to obtain an error value related to the slice level due to asymmetry of the zero cross signal. By this invention, the asymmetry between the positive cycle and the negative cycle of the zero cross signal can be adjusted.

A peak detector circuit for video signals is disclosed. The peak detector circuit comprises a buffer operational amplifier, a strap diode and feedback resistor in order to bootstrap an operational amplifier used in the circuit and to isolate and provide feedback for the circuit An alternative embodiment of this invention utilizes a transistor instead of a strap diode to provide faster charging for a hold capacitor used in the circuit through current gain action of the transistor. The peak detector circuit of this invention permits tracing the input voltage while the operational amplifier remains in the active region, where it is the fastest, without going into saturation during negative cycles of the signal.

The invention relates to a positive cycle and reverse cycle double-duty three cone bit which is adopted when in positive cycle drilling or reverse cycle drilling and is mainly composed of a crossover sub, a reverse cycle flow inducing hood, a drill bit body, a reverse cycle flow passage valve, a nozzle flow passage valve, a reverse cycle flow passage, a sealing cavity which controls the reverse cycle flow inducing hood to go upwards and downwards and the like, when in the reverse cycle drilling, the reverse cycle flow inducing hood goes downwards, simultaneously, the reverse cycle flow passage valve opens, the nozzle valve closes, and a flow inducing baffle plate directly induces annular fluid into the well bottom to strengthen the carrying cutting capacity of the fluid. When in the positive cycle drilling, reverse cycle flow inducing hood goes upwards, simultaneously, the reverse cycle flow passage valve closes, and the nozzle valve opens, which realizes the positive cycle drilling. In the process of drilling, Automatic switches between the positive cycle drilling and the negative cycle drilling are realized through the negative cycle flow passage valve, the nozzle flow passage valve and a sealing cavity passage according to the liquid flowing direction.

A power converter includes a self-driven circuit for appropriately turning ON and OFF a synchronous rectifier during the operating cycle of the power converter. Without the use of a smart controller coupled to the synchronous rectifier, the self-driven circuit turns ON the synchronous rectifier during the positive cycle of the power converter when the main switch is turned OFF, and the self-driven circuit turns OFF the synchronous rectifier during the negative cycle of the power converter when the main switch is turned ON. Unlike conventional self-driven circuits that include an auxiliary secondary winding for driving a synchronous rectifier, the self-driving circuitry of the present application does not include an auxiliary secondary winding.

An electronic braking and energy recycling system associated with a direct current (DC) brushless motor, characterized in that when an electronic braking task is launched, a phase voltage occurred in an inverse mode is applied onto a motor coil corresponding thereto and a gate voltage signal with positive and negative cycles is used to control an upper-side and lower-side branches to switch as compared to each other in the system, so as to redirect a current flown through the motor back to a power source end. In this invention, a controllable inverse torsion is achieved, enabling an electrical machine to be braked smoothly and reliably when necessary. As such, a dynamic power of the motor can be recycled at a maximum rate and thus the purpose of energy recycling is achieved. In addition, no complex circuitry configuration owing to the multi-phase coils is required.

The invention provides a method for controlling a single-phase non-isolated photovoltaic inverter with a follow current clamping switch. The method for controlling the single-phase non-isolated photovoltaic inverter with the follow current clamping switch comprises the steps that two-section control is conducted on switch tubes in the inverter; the gate source control waveform of the first switch tube is made to the same as that of the fourth switch tube, wherein the gate source control waveforms are SPWM waveforms in the half positive cycle during which current is output by the inverter, and the gate source control waveforms are zero waveforms in the half negative cycle during which current is output by the inverter; the gate source control waveform of the second switch tube is made the same as that of the third switch tube, wherein the gate source control waveforms are zero waveforms in the half positive cycle during which current is output by the inverter, and the gate source control waveforms are SPWM waveforms in the half negative cycle during which current is output by the inverter; the gate source control waveform of the fifth switch tube and the gate source control waveform of the sixth switch tube are made to be complementary with the gate source control waveform of the first switch tube and the gate source control waveform of the fourth switch tube in the half positive cycle during which current is output by the inverter and be complementary with the gate source control waveform of the second switch tube and the gate source control waveform of the third switch tube in the half negative cycle during which current is output by the inverter. By the adoption of the method for controlling the single-phase non-isolated photovoltaic inverter with the follow current clamping switch, the conversion efficiency of the non-isolated photovoltaic inverter can be improved, and the common-mode characteristic of the non-isolated photovoltaic inverter is improved.

A method for designing wiring topology for electromigration avoidance, which is composed of multiple sources, multiple sinks and multiple wires, is disclosed. The steps of said method to get an optimal topology includes: 1. calculating the length of all the wires to choose one of the wires with the shortest length as a feasible wire, 2. deciding a capacity of the feasible wire, 3. deciding the capacities of the other wire according to the capacity of the feasible wire, a flow of the source of the feasible wire and a flow of the sink of the feasible wire, 4. comparing the length of the other wires to select another feasible wire, 5. repeating said steps until finding all feasible wires for constructing a feasible topology, 6. creating a flow network according to the feasible topology, 7. iteratively checking if a negative cycle exists in the flow network and removing it until no more negative cycles.

A regulator rectifier device and a method for regulating an output voltage of the same which takes input from three phase alternating current voltage generating device with each phase including a positive cycle and a negative cycle. A first rectifying unit with a first gate terminal, connected to the generating device to rectify the positive cycle of said three phase alternating current voltage. A second rectifying unit with a second gate terminal, connected to said generating device to rectify the negative cycle of said three phase alternating current voltage, wherein said second rectifying unit switches between rectification mode and shunt mode depending on the load condition. And a controlling unit configured to control said second rectifying unit by a gate control signal, said controlling unit outputs said gate control signal based on an output voltage of said regulator rectifier device with respect to a first predefined voltage in battery connected condition or third predefined voltage in battery-less condition and said positive cycle and said negative cycle of each phase of said three phase alternating current voltage from said generating device, said gate control signal enables said second rectifying unit to switch between rectification mode and shunt mode by controlling the second gate terminal of said second rectifying unit, wherein said gate control signal switches said second rectifying unit into shunt mode when the output voltage of said regulator rectifier device is greater than said first predefined voltage in battery connected condition or third predefined voltage in battery-less condition and thereby continuing the shunting of said second rectifying unit as long as said positive cycle of corresponding phase of said three phase alternating current voltage exists.

An embodiment of the invention discloses a voltage-to-current converter. The voltage to current converter includes a converter circuit having an input node, an amplified signal node and an output. The input node is configured to receive a sinusoidal voltage signal and the output is configured to provide a half-wave current signal. A transistor having a gate, a source, and a drain is coupled to the input node. The input node is coupled to one of the source or the drain. The amplified signal node is coupled to the gate. A process tracking stabilizer is coupled to the transistor at the source or the drain not coupled to the input node. The process tracking stabilizer is configured to generate a control voltage for the transistor. The control voltage is configured to maintain a predetermined non-zero voltage at the input node of the converter circuit during a negative cycle of the sinusoidal voltage signal. The embodiment of the invention further provides an RF transceiver.

A method for designing an optimal wiring topology for electromigration avoidance is disclosed. The wiring topology includes multiple sources, multiple sinks and multiple wires. The method includes the following steps: A feasible wire, a wire of the shortest length connecting each pair of source and sink, is calculated, and the capacity of each feasible wire is decided. An initial feasible topology is found. A flow network is created based on the initial topology. Negative cycles are iteratively checked and removed until no more negative cycles.

Tri-level scrambling in a digital to analog converter system is achieved by, in response to a tri-level binary code input, disabling a negative data directed scrambler circuit when the input code is in the positive cycle portion, disabling a positive data directed scrambler circuit when the input code is in the negative cycle portion and disabling both scrambler circuits upon a zero input code for reducing low level distortion due to a reversal of current during crossover between those cycles.

The invention provides the harmonic current restraining method. It provides the changing of the load current value based on the positive, negative cycle, the comparative MCU module is applied to control the opening, breaking estate of the switch setting connecting the two outputs of the bridge rectifier and the accounting empty percentage during the shutting estate, so the restraining harmonic wave, the improving of the power factor and the raise of the direct current side voltage can be realized. The controlling switch is on the state of the cutting during the first controlling time segment t1; the MCU controlling chip controlling switch can conduct the high frequent switch between the state of the shutting and the cutting during the second controlling time section t2; the switch is cutting during the third controlling time section t3, so the current through the loading depresses and the rises, and it can tend to the second peak value current V2 gradually. The MCU controlling chip controlling switch can conduct the high frequent switch between the state of the shutting and the cutting during the four controlling time section t4.

A method for verifying the performance of a real-time system modeled as a timed automaton. An abstract model of the system is checked against an initial Linear Temporal Logic specification. If a path to an undesirable state is found, the counterexample is validated or invalidated using negative cycle detection. If a negative cycle is detected, optimization is undertaken to identify a minimal infeasible fragment in the negative cycle. The specification is then refined to eliminate usage of the minimal infeasible fragment, and the abstract model is then checked against the refined specification.

Tri-level scrambling in a digital to analog converter system is achieved by, in response to a tri-level binary code input, disabling a negative data directed scrambler circuit when the input code is in the positive cycle portion, disabling a positive data directed scrambler circuit when the input code is in the negative cycle portion and disabling both scrambler circuits upon a zero input code for reducing low level distortion due to a reversal of current during crossover between those cycles.

The invention provides an isolation type accurate zero-crossing detection circuit. The circuit comprises a waveform positive and negative detection circuit, an isolation circuit and a signal generation circuit; an alternating current signal of an alternating current detection source is transmitted into the waveform positive and negative detection circuit, and the waveform positive and negative detection circuit controls the isolation circuit and transmits a waveform positive and negative cycle signal to the signal generation circuit. The zero-crossing detection circuit has the advantage that zero-crossing detection of an alternating current source is achieved, large detection errors existing in normal zero-crossing detection are avoided, and isolation of the circuits is realized by utilizing an optocoupler.

The invention discloses a transformer magnetic bias prevention circuit of a bidirectional transducer. The transformer magnetic bias prevention circuit comprises a primary-side bridge circuit B, a secondary-side bridge circuit C and a resonant network A; the resonant network A comprises a power transformer Tr, a resonant inductor Lr and a blocking capacitor Cr; the primary-side bridge circuit B comprises a switch tube Q1, a switch tube Q2, a switch tube Q3 and a switch tube Q4; the secondary-side bridge circuit C comprises a switch tube Q5, a switch tube Q6, a witch tube Q7 and a switch tube Q8. By the arrangement, the problem about transformer magnetic bias is solved ingeniously; the blocking capacitor is added in the resonant network and can naturally perform reverse callback on the situation that volt-second products of positive and negative cycles are not equal, a natural negative feedback is formed, a magnetic core of the transformer can be sustained in a state of volt-second equilibrium, and magnetic bias of the transformer can be well prevented.

The invention belongs to the technical field of illumination power supplies, and specifically relates to a closed-loop control LED power supply, wherein an alternating current commercial power input of 110V-230V is connected with a filtering coil L wiring terminal of a filtering coil L; a wiring terminal is connected with a commercial power N stage; a voltage-regulating variable resistor R3 is connected with a bidirectional diode DB3 after being connected in series with a resistor R2, a triggering capacitor C2 and a thermistor RT, so as to constitute a silicon-controlled conduction angle control circuit. The bidirectional diode DB3 is connected with a G stage of a silicon controlled rectifier. The thermistor RT is put in a proper position of an LED lamp for controlling a silicon-controlled conduction angle, thereby providing a closed-loop control signal for the LED lamp. A current-limiting resistor R1 is connected with all load terminals of the LED lamp; other terminals of the LED lamp are connected with a full-bridge cathode. A full-bridge output terminal is connected with the LED lamp. A full-bridge input terminal is connected with the commercial power through the silicon-controlled rectifier. The full bridge works in both the positive cycle and the negative cycle of the alternating current. A filtering capacitor C1 is connected with a rectifying full bridge. The closed-loop control LED power supply has the advantages of a simple circuit, a safe and reliable use, a low cost, and a low fault rate.

A drive circuit for an electric motor having a wound stator and a permanent magnet rotor, includes a controllable bidirectional AC switch connected in series with a stator winding between two terminals for connecting to an AC power supply. First and second position sensors detect the position of magnetic poles of the rotor. A voltage regulating circuit is connected between the two terminals and the controllable bidirectional AC switch and configured to supply power to the first sensor during the positive cycle and to the second position sensor during the negative cycle of the AC power supply such that the controllable bidirectional AC switch is switched between a conductive state and a non-conductive state in a preset manner, thus enabling the stator to rotate the rotor in only one predetermined direction during start-up.

The invention provides the harmonic current restraining method. It provides the changing of the load current value based on the positive, negative cycle, the comparative MCU module is applied to control the opening, breaking estate of the switch setting connecting the two outputs of the bridge rectifier and the accounting empty percentage during the shutting estate, so the restraining harmonic wave, the improving of the power factor and the raise of the direct current side voltage can be realized. The controlling switch is on the state of the cutting during the first controlling time segment t1; the MCU controlling chip controlling switch can conduct the high frequent switch between the state of the shutting and the cutting during the second controlling time section t2; the switch is cutting during the third controlling time section t3, so the current through the loading depresses and the rises, and it can tend to the second peak value current V2 gradually. The MCU controlling chip controlling switch can conduct the high frequent switch between the state of the shutting and the cutting during the four controlling time section t4.

The invention discloses a resistance measurement circuit of raising preset level triangular wave excitation, and relates to the field of resistance measurement. The resistance measurement circuit comprises a microcontroller which controls a digital-to-analog converter to output raising preset level triangular wave voltage signals of which the positive and negative cycles are symmetric. The raising preset level triangular wave voltage signals are converted into raising preset current value triangular wave current signals through a voltage and current converter. The raising preset current value triangular wave current signals excite the measured resistor to generate voltage signals. The voltage signals are inputted to an analog-to-digital converter through amplification of an amplifier, and the analog-to-digital converter inputs the conversion result to the microcontroller. The microcontroller enables the result of accumulation and subtraction of the respective data of the positive and negative half cycles of the raising preset level triangular waves to be proportional to the measured resistor so as to calculate the resistance value of the measured resistor. The complexity of a constant current source circuit and a subsequent measurement circuit can be reduced and the accuracy of resistance measurement can be enhanced.

The invention relates to an alternating current light emitting diode for preventing the generation of harmonic wave and stroboflash, which comprises an alternating current power supply receiving end for receiving an alternating current power supply containing a positive cycle power supply and a negative cycle power supply, a first group of light emitting diodes conducted in the positive cycle power supply and closed in the negative cycle power supply, and a second group of light emitting diodes conducted in the negative cycle power supply and closed in the positive cycle power supply, wherein the integral starting voltage of the first group and the second group of light emitting diodes is lower than the peak value of the alternating current power supply and beyond a default value, and the integral bearable inverse voltage is higher than the peak value of the alternating current power supply to promote the power factors and prevent the generation of the harmonic wave; and thus, the stroboflash phenomenon of the alternating current light emitting diodes is effectively improved.

A multi-core parallel implementation method for large integer multiplication SSA algorithm based on FFT. It is a multi-core parallel optimization of large integer multiplication SSA algorithm from a fine-grained perspective. Its core is to use the SSA algorithm to obtain four negative circular convolution The core calculation process is designed in parallel, that is, the four calculation processes of decomposition, FFT forward transformation, point multiplication and FFT inverse transformation are respectively optimized. The invention makes full use of the multi-core resources of the hardware and improves the running speed, which plays a very important role in practical application.

A drive circuit for an electric motor having a wound stator and a permanent magnet rotor, includes a controllable bidirectional AC switch connected in series with a stator winding between two terminals for connecting to an AC power supply. First and second position sensors detect the position of magnetic poles of the rotor. A voltage regulating circuit is connected between the two terminals and the controllable bidirectional AC switch and configured to supply power to the first sensor during the positive cycle and to the second position sensor during the negative cycle of the AC power supply such that the controllable bidirectional AC switch is switched between a conductive state and a non-conductive state in a preset manner, thus enabling the stator to rotate the rotor in only one predetermined direction during start-up.