88 results about "Miller effect" patented technology

A adaptive pole and zero and Pole-Zero Cancellation Control Low Drop-Out (LDO) regulator is provided, which includes a regulation unit, an error amplifier, a Miller Effect Pole control unit, a Pole Zero Cancellation delay unit, and a feedback network. Pole and Zero could be adaptive regulated depend on various loads and maintain stably in a perfect phase margin.

A MOSFET main switch transistor has a pull-down FET coupled between a drain thereof and the gate of the main switch transistor. A gate of the pull-down FET is coupled to the drain of the main switch transistor by a capacitor and is connected to a source thereof by a resistor. The pull-down FET is operated by capacitive coupling to the voltage drop across the main switch and can be used to hold the gate of the main switch transistor at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor by the Miller effect.

An apparatus and method for adaptively controlling power supplied to a hot-pluggable subsystem controls the inrush current of the hot-pluggable subsystem when the subsystem is coupled to another system that supplies power, and optionally other signal connections. The apparatus and method adaptively control a pass device by detecting the voltage at the gate of the pass device during initial charging of the gate. The gate voltage may be sampled and used subsequently to control the operation of the pass device, and short-circuit conditions may be detected by determining that the miller effect does not change the charging of the gate capacitance. Automatic restart circuitry can be included to generate multiple startup attempts, and under-voltage lockout circuitry and power-on-reset timers can be used to provide a robust solution. The apparatus and method can be adapted to provide a three terminal device that does not require a feedback connection from a power supply output. The three terminal device may include the pass device, or may control an external pass device.

A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device. A compensation capacitor and resistor may be coupled in series between the output of the error amplifier and the output of the voltage regulator to provide frequency compensation for the Miller-Effect.

The invention provides an active surge current control circuit, which consists of an electrification starting circuit, an MOSFET and a gate source voltage Vgs slope control circuit thereof, wherein a drain of the MOSFET is connected to load, and a source is connected to external input; the starting circuit consists of resistors and a Zener diodes series circuit, is spanned at two ends of the input, and sets the minimum input voltage in the working of the whole circuit and the maximum working voltage in the working of the Vgs slope control circuit; the Vgs slope control circuit consists of a resistor, a capacitor spanned between a triode c and a triode b, a diode which is reversely spanned between a triode e and the triode b, and an MOSFET protective resistor between the triode e and the triode c, controls Vgs climbing speed of the MOSFET after a power supply starts supplying power, is combined with the miller effect of Cgd in the MOSFET, and finally controls current amplitude for charging the capacitor of the load input end through the MOSFET so as to ensure that uncontrollable surge current with large amplitude in the electrifying moment can be prevented; the capacitor between the triode c and the triode b in non-electrifying period discharges through the diodes and the triode c and the triode b; and when the spanning of the slope control circuit works normally, the Vgs slope control circuit ensures that the MOSFET is completely conducted and has the minimum power consumption.

A low dropout linear regulator with high power supply rejection ratio is characterized in that a compensation network (201) with transmission function being Zpc and the ability of reducing equivalent output capacitance of N1 node is arranged between a power supply Vdd and the output end of an error amplifier. With the adoption of the low dropout linear regulator, near-zero points on PSRR curve are effectively pushed away, the stabilization of the LOD can be kept when the PSRR property at high frequency is improved, and the problem that PSRR main zero points are too small, caused by the miller effect, is solved.

A current reference circuit is disclosed. A small startup current is defined as the base current into a bipolar transistor with its collector-emitter path connected in series with a resistor between the power supply voltage and ground. This startup current is conducted via a diode-connected MOS transistor in a first leg of a current mirror. Temperature compensation is maintained by a reference leg in the current mirror that includes a bipolar transistor having an emitter area N times larger than that of a bipolar transistor in a second leg of the current mirror, to establish a temperature-compensated current in the reference leg. A compensation capacitor connected between the collector and base of a bipolar transistor in the first leg suppresses oscillation, and can be modest in size due to the Miller effect.

The invention relates to a digital intelligent driving device of a high-power IGBT (insulated gate bipolar translator). The digital intelligent driving device comprises a DC/DC (direct-current) conversion circuit, a CPLD (complex programmable logic device) logic control module, an active clamping feedback module, a retreating-protection over-current feedback module and a two-stage di/dt detecting module, wherein the output end of the DC/DC conversion circuit is connected with an undervoltage protection module; the output end of the undervoltage protection module is connected with the CPLD logic control module; and the input end of the CPLD logic control module is connected with a PWM (pulse-width modulation) pulse-width modulator, and the output end of the CPLD logic control module is connected with a variable-gate resistance module. The digital intelligent driving device provided by the invention has the advantages that the protection functions such as power isolation, over-current protection, di/dt and active clamping are integrated, the logic control is realized by adopting the programmable logic device CPLD, the ideal driving performance is achieved by real-time variable-gate resistance driving, and soft shut-off is realized by selecting proper shut-off resistance according to the over-current degree, so that the switching loss is effectively reduced and a Miller effect is weakened.

A device to control the charging rate of an ignition coil for an internal combustion spark ignition engine. The device controls the turn-on rate of the primary coil by slew-rate limiting using switching devices and a Miller-effect capacitor in order to reduce secondary oscillation magnitudes originated by a sharp transition of the controlling switch.

A method is contemplated. According to the method, capacitances in a first resistance/capacitance (RC) extraction corresponding to a circuit are modified. Each capacitance is modified to estimate Miller effect on that capacitance. A ratio of a total capacitance on a first wire after the modification in the first RC extraction to a total capacitance on the first wire before the modification in the first RC extraction is calculated. Capacitances in a second RC extraction that are coupled to the first wire are modified according to the ratio. The second RC extraction is a reduced extraction as compared to the first RC extraction. A timing analysis is performed for the circuit using the second RC extraction with capacitances modified to estimate Miller effect.

A new offset canceling circuit for a differential circuit is disclosed whose input offset voltage may be cancelled independent of the variation of the input level, accordingly, enables the cut-off frequency of the canceling circuit unchanged. The offset canceller of the invention provides a buffer amplifier and a filter. The filter includes a capacitance multiplier including an operational amplifier (Op-Amp) operating in the inverting mode and a capacitor connected between the input and output of the Op-Amp. The Op-Amp operating in the inverting mode whose closed loop gain is solely determined by resistors, and the capacitance of the capacitor is multiplied by the closed loop gain of the Op-Amp by the Miller effect.

The invention provides a resonance drive module control method with a dynamic power, adopting the technical scheme: the traditional hard switch drive is improved to the resonance soft switch drive, the dynamic power +Von capacitance pump lower than Ugs is used to supply power to drive the voltage Ugs, in the non-driving period, the grid voltage Ugs is -Voff negative bias, which effectively overcomes Ci 'the Miller effect', reduces the feedtrhough harm of the half bridge or the full bridge; the capacitance pump of the power Von in the driving period and the capacitance pump of the -Voff in the non-driving period are all supplied with power by a secondary winding of an isolating transformer, namely the transformer transmits the driving frequency f, also transmits the two dynamic capacitance pump power +Von and -Voff. The invention has the advantages of strong interference killing feature, higher reliability of the negative bias drive of the combination module, little loss, high efficiency and excellent performance price ratio.