188results about "Etching metal masks" patented technology

An opening is formed in resin by a laser beam so that a via hole is formed. Copper foil, the thickness of which is reduced to 3 mum by etching to lower the thermal conductivity, is used as a conformal mask. Therefore, an opening is formed in the resin and the number of irradiation of pulse-shape laser beam is reduced. Thus, occurence of undercut of the resin, which forms an interlayer insulating resin layer, can be prevented and the reliability of the connection of the via holes can be improved.

The present invention provides for a balanced laminated integrated circuit package. The package includes a two metal layer bumped circuit, a first adhesive layer having a thickness on a first side of the bumped circuit, a first outer conductive layer having a thickness bonded to the first adhesive layer and a second adhesive layer having a thickness substantially equal to the thickness of the first adhesive layer on a second side of the bumped circuit. The invention also includes a second outer conductive layer bonded to the second adhesive layer, the second outer conductive layer having a thickness substantially equal to the thickness of the first outer conductive layer.

A wireless suspension blank is made using a two-layer laminate composed of a metallic layer with the spring property and an electrically insulating layer. The first method includes a first step for working the metallic layer by the photo etching method, a second step for forming a wiring part on the insulating layer by the semi-additive method and a third step for working the insulating layer by the wet-etching method. The second method includes a first step for working the metallic layer by the photo etching method, a second step for forming a wiring part on the insulating layer by the semi-additive method and a third step for working the insulating layer by the plasma etching method. The third method includes a first step for forming a wiring part on the metallic layer by the semi-additive method, a second step for working the metallic layer by the wet-etching method and a third step for working the insulating layer by the dry-etching method or the wet-etching method. The use of a two-layer laminate makes possible a low cost production. Further, the forming of a wiring part by the semi-additive method makes possible to working very accurately a fine wiring part.

The present invention relates to a rigid-flexible printed circuit board and, more particularly, to a rigid-flexible printed circuit board including CL via holes which can facilitate electrical connection to an inner circuit pattern in a flexible region. Since the coverlays are layered on the entire surface of the double-sided FCCL without previous processing thereof, the via holes are formed in the coverlays while a drilling process is performed to form the via holes, and then the copper plating is performed over the entire surface thereof, it is possible to eliminate the cost of previously processing the coverlays, easily perform a process of provisionally layering the coverlays on the double-sided FCCL, and decrease the cost therefor.

A circuit device suitable for connecting a plurality of laminated wiring layers to each other through an insulating layer, and a manufacturing method thereof are provided. According to a hybrid integrated circuit device of the present invention and a manufacturing method thereof, a first conductive film is laminated on a first insulating layer, and a first wiring layer is formed by patterning the first conductive film. Next, a second conductive film is laminated on a second insulating layer. Thereafter, by partially removing the second insulating layer and the second conductive film in a desired spot, a connection part for connecting the wiring layers to each other is formed.

A method of manufacturing a flexible circuit electrode array that provides excellent adhesion between the polymer base layer and the polymer top layer and insulation of the trace metals and electrodes. A layer of polymer is laid down. A layer of metal is applied to the polymer and patterned to create electrodes and leads for those electrodes. A second layer of polymer is applied over the metal layer and patterned to leave openings for the electrodes, or openings are created later by means such as laser ablation. Hence the array and its supply cable are formed of a single body. Alternatively, multiple alternating layers of metal and polymer may be applied to obtain more metal traces within a given width.

A printed circuit board and a manufacturing method thereof are disclosed. Using a method of manufacturing a printed circuit board which includes forming a circuit pattern, which includes lands, on a first board; forming a paste bump on the land of the first board; and stacking an insulation on a surface of the first board such that the paste bump penetrates the insulation, where the paste bump is formed to cover the land of the first board, the areas of the lands can be reduced to manufacture a printed circuit board of high density, and the contact reliability can be increased due to the increase in contact area between the lands and paste bumps to improve the performance of the high-density printed circuit-board.

A printed circuit board and a manufacturing method thereof are disclosed. Using a method of manufacturing a printed circuit board which includes forming a circuit pattern, which includes lands, on a first board; forming a paste bump on the land of the first board; and stacking an insulation on a surface of the first board such that the paste bump penetrates the insulation, where the paste bump is formed to cover the land of the first board, the areas of the lands can be reduced to manufacture a printed circuit board of high density, and the contact reliability can be increased due to the increase in contact area between the lands and paste bumps to improve the performance of the high-density printed circuit-board.

A Printed Circuit Board (PCB) is provided in which at least one built-in Integrated Circuit (IC) package has a plurality of conductive bumps on an IC. The plurality of conductive bumps are for external electrical connection. The IC package is accommodated within a core layer of a multi-layer PCB by a connection member on the IC. The connection member is formed between the conductive bumps and the core layer with contact holes in contact with the conductive bumps. The conductive bumps are electrically connected through conductor layers formed in the contact holes.

In a laser beam machining method for a wiring board, a machined portion of the wiring board is irradiated with a pulsed laser beam for a beam irradiation time ranging from about 10 to 200 μs and with energy density of about 20 J / cm2 or more, thereby machining the wiring board, for example, drilling for a through-hole and a blind via hole, grooving, and cutting for an outside shape. The laser beam operates at a frequency of more than 67 Hz, and the spot of the laser beam is sequentially moved to different drilling positions for each pulse. After all of many drilling positions in the range of a scan vision are irradiated with the laser beam pulse by pulse, or after the elapse of a time of 15 ms or more from irradiation of the first drilling position, the laser spot is returned to the first drilling position. The spot is sequentially moved once again, and the movement is repeated several times. A pause of 15 ms or more is required between pulses directed to the same drilling position to avoid formation of a thick char layer and projection of glass cloth into the hole.

In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n−1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.

In a multilayered wiring substrate in which insulation layers 104A, 106A, wiring layers 105A, 108A and insulation layers 104B, 106B, wiring layers 105B, 108B are laminated on both side surfaces of a core layer 101A, respectively, the core layer 101A is constituted by insulation material 112 having no reinforcing member and copper foils 113 (pattern wiring portions 103b) formed on the both side surfaces of the insulation material 112.

Printed circuit boards have circuit layers with one or more via filled holes with copper wraps and methods of manufacturing the same. An embodiment of the present invention provides a method to enhance the consistency of the wraparound plating of through-hole vias of printed circuit boards with (requiring) via filling to provide extra reliability to the printed circuit boards and enables the designers and / or manufacturers of printed circuit boards to design and manufacture boards with relatively fine features and / or tight geometries.

The method for forming wiring includes: laminating a thermosetting resin film in a semi-cured state and a metallic foil in this order on an insulating substrate where base-layer wiring is formed, a mat surface of the metallic foil facing the resin film, pressing the film and the foil with application of heat; forming an opening in the metallic foil so as to expose a part of the insulating resin layer in which a via hole is to be formed; forming the via hole in the insulating resin layer by irradiating high-energy beams on to insulating resin layer by using as a mask the metallic foil in which the opening is formed; performing a desmear process of the via hole via the opening of the metallic foil; removing the metallic foil by etching; forming an electroless-plated layer that continuously covers the top surface of the insulating resin layer, a side surface of the via hole and a top surface of the base-layer wiring corresponding to the bottom of the via hole; and forming wiring including an electroplated layer on the electroless-plated layer by a semi-additive process.

A multilayer circuit board comprises core layers 101 and 102 made of a core material impregnated with resin, resin layers 111 and 112 interposed between the core layers 101 and 102, a wiring pattern 140 embedded in the resin layers 111 and 112. The core layers 101 and 102 have a thickness of 100 μm or smaller, whereby the entire board can significantly be thinned. Furthermore, the less strong resin layers 111 and 112 are interposed between the hard core layers 101 and 102, whereby the entire board has increased strength.

A method of forming a conductive device includes forming a conductive layer on a substrate; etching the conductive layer to form a plurality of conductive traces; etching the conductive layer to form at least one mask feature; and removing substrate material that is not covered by the at least one mask feature so as to form at least one mechanical alignment feature.

Holes having the same diameter as via holes are formed in predetermined positions in advance when forming wiring patterns on releasable carriers. The carriers with the wiring patterns are bonded on an insulating material, and a laser beam is irradiated from the side of the carrier using the holes in the wiring pattern as a laser mask to form via holes in the insulating material. The via holes and the holes in the carrier are then filled with a conductive paste. With the holes in the carrier that are matched in position with the via holes, lands in the conductor layers are precisely positioned relative to the via holes. A multilayer circuit board thus produced has lower electrical connection resistance and excellent mountability with improved performances. Also a manufacturing method thereof is achieved.

The present invention provides a multilayer circuit board that includes a plurality of resin layers, conductive wiring layers, and via-hole conductors. Each of the resin layers includes a resin sheet containing a resin and a conductive wiring layer disposed on at least one surface of the resin sheet. The via-hole conductors contain an intermetallic compound having a melting point of 300° C. or more produced by a reaction between a first metal composed of Sn or an alloy containing 70% by weight or more Sn and a second metal composed of a Cu—Ni alloy or a Cu—Mn alloy. The second metal has a higher melting point than the first metal.

In production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101~103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 131, 161 and the blind via-holes 141, 142.

A method for manufacturing an IC-embedded substrate comprises a first step for encapsulating at least an IC chip having a pad electrode in an insulating layer, a second step for forming a metal layer having at least a first aperture in a location directly above the pad electrode of the IC chip and a second aperture in a location above an area other than the area in which the IC chip is mounted, and a third step for selectively removing the insulating layer by a blasting treatment in which the metal layer is used as a mask, whereby forming a first via hole that corresponds to the first aperture and a second via hole that corresponds to the second aperture.

The invention provides a high density package substrate and a method for fabricating the same. A double-sided copper clad laminate containing an upper copper foil and a lower copper foil is provided. A bottom pad is disposed on the lower copper foil, aligned to a predetermined position of a through hole. The through hole is formed by laser drilling through the upper copper foil and the substrate, but not through the bottom pad. A seed layer is formed conformally lining the through hole, and a metal layer is formed on the seed layer by plating to form a plated through hole (PTH).

A device mounting board has a double-layer wiring structure where a first wiring layer and a second wiring layer are stacked together with an insulating layer held between the first and second wiring layers. The first wiring layer and the second wiring layer are electrically connected by way of a via conductor provided on a side wall of a through-hole that penetrates the insulating layer. The through-hole that penetrates the insulating layer has a stepped portion. The via conductor, provided along the insulating layer in the via conductor, has a step associated with the stepped portion of the via conductor.

A laser drilling system for drilling blind vias in printed circuit board panels, multichip modules and chipscale packages with top and bottom surfaces and which include multiple dielectric polymer and metal layers. The system includes a first laser module comprising a laser able to form at least one via per pulse through one or more polymer layers. The vias are circular or non-circular in shape. An articulated arm is adapted to move at a speed of about 200 inches per second and at an acceleration of about 5 g's or more. A beam delivery unit is attached to the articulated arm and a conveyor adapted to move panels at a constant speed. The first laser module positioned on a separate track from the conveyor moves at a faster rate than the conveyor to drill the top surface. A second laser module is positioned to move on another separate track from the conveyor movable at a faster rate so as to drill the bottom surface.

Disclosed herein is a printed circuit board and a method of manufacturing the same, in which a bump is formed using solder paste printing, and a heat radiation layer is formed using a metal layer used in the course of forming the bump, thus simplifying the formation of the bump, reliably mounting the bump, and improving heat-radiating properties.

A method and arrangement for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, there are provided vias of either through-holes, blind holes and buried holes filled with a conductive paste material to form electrical interconnections with conductive layers of the printed wiring board.

A method of processing a cavity of a core substrate is disclosed. The method of processing a cavity of a core substrate in accordance with an embodiment of the present invention can include: forming a first processing area on one surface of a core substrate, the first processing area being demarcated by a circuit pattern; forming a second processing area on the other surface of the core substrate, the second processing area being demarcated by a circuit pattern; and processing a cavity by removing the entire first processing area from the one surface of the core substrate.

A circuit board having a removing area is provided. The circuit board includes a first dielectric layer, a first laser resistant structure disposed on the first dielectric layer and located at the periphery of the removing area, a second dielectric layer disposed on the first dielectric layer, a circuit layer disposed on the second dielectric layer, a second laser resistant structure disposed on the second dielectric layer and located at the periphery of the removing area, and a third dielectric layer disposed on the second dielectric layer. The second laser resistant structure is insulated from the circuit layer. There is a gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on a first surface overlaps the first laser resistant structure. The third dielectric layer exposes the portion of the circuit layer within the removing area.

In etching an organic insulating layer made of a polyimide film, a polyimide containing at least a recurrent unit expressed by general formula (1) is used for the polyimide film: ;and an alkaline etchant containing oxyalkylamine, a hydroxide of an alkaline metal compound, water, and preferably an aliphatic alcohol is used as an etchant. The composition enables efficient formation of desirably shaped via holes and through holes through the organic insulating layer on a wiring board.