631 results about "Low inductance" patented technology

A capacitor-built-in-type printed wiring substrate which can reliably eliminate noise and attain extremely low resistance and low inductance in connections between an IC chip and the capacitor, and a printed wiring substrate and capacitor for use in the same. A capacitor-built-in-type printed wiring substrate 100 on which an IC chip is mounted includes a capacitor-built-in-type printed wiring substrate 110 and an IC chip 101 mounted on the capacitor-built-in-type printed wiring substrate 110. A printed wiring substrate 120 includes a number of connection-to-IC substrate bumps 152 and a closed-bottomed capacitor accommodation cavity 121 formed therein. A capacitor 130 is disposed in the cavity 121 and includes a pair of electrode groups 133E and 133F and a number of connection-to-IC capacitor bumps 131 connected to either one of the paired electrode groups 133E and 133F. The connection-to-IC capacitor bumps 131 are flip-chip-bonded to corresponding connection-to-capacitor bumps 103 on the IC chip 101. The connection-to-IC substrate bumps 152 are flip-chip-bonded to corresponding connection-to-substrate bumps 104 on the IC chip 101.

An optical illuminator using Vertical Cavity Surface Emitting Laser (VCSEL) is disclosed. Optical modules configured using single VCSEL and VCSEL arrays bonded to a thermal submount to conduct heat away from the VCSEL array, are suited for high power and high speed operation. High speed optical modules are configured using single VCSEL or VCSEL arrays connected to a high speed electronic module on a common thermal submount or on a common Printed Circuit Board (PCB) platform including transmission lines. The electronic module provides low inductance current drive and control functions to operate the VCSEL and VCSEL array. VCSEL apertures are designed for a desired beam shape. Additional beam shaping elements are provided for VCSELs or VCSEL arrays, for desired output beam shapes and / or emission patterns. VCSEL arrays may be operated in continuous wave (CW) or pulse operation modes in a programmable fashion using a built-in or an external controller.

A method and system for providing a thin film recording head are disclosed. The method and system include providing a first pole, providing a second pole and providing a write gap separating the first pole from the second pole. The method and system further include providing at least one coil having a plurality of turns. A portion of each of the plurality of turns is between the first and the second pole. The plurality of turns wind around the second pole.

A low inductance electrical machine that may be used as an alternator or motor with low armature inductance is disclosed. Arrangements of complementary armature windings are presented in which the fluxes induced by currents in the armature windings effectively cancel leading to low magnetic energy storage within the machine. This leads to low net flux levels, low core losses, low inductance and reduced tendency toward magnetic saturation. The inclusion of additional gaps in the magnetic circuit allows for independent adjustment of air gap geometry and armature inductance. Separately excited field arrangements are disclosed that allow rotor motion to effect brush-less alternator or brush-less motor operation. An exemplary geometry includes a stator including two annular rings and a concentric field coil together with a rotor structure separated from the stator by four air gaps.

Placing inductors or resistors in parallel causes the combined value of inductance or resistance to decrease according to the parallel combination rule. This invention decreases the parasitic resistance of an inductor by placing several inductors in parallel. Furthermore, by careful placement of these inductors, the mutual inductance between these inductors can be used to increase the equivalent inductance value to a value near that of the original inductance value of a single inductor. Thus, it is possible to create an inductance with a much lower value of parasitic resistance. This invention allows the formation of high Q inductors and would be beneficial in any circuit design requiring inductances. Another aspect of this invention is that the coils can be partitioned to minimize eddy current losses. This invention can easily be implemented in a planar technology. Simulations of several tank circuits indicate that the power dissipation can be reduced 3 to 4 times when compared to conventional techniques.

A flip chip power device having an integrated low inductance ground and heat sink path and an isolation structure is provided. A substrate is formed having transistors and an ohmic contact region circumscribing the transistors. Dielectric layers are formed on the substrate, and a common metal layer is formed on the dielectric layers. An isolation metal layer is formed on the dielectric layers above the ohmic contact region. The common metal layer is coupled to a first region of each of the transistors, and the isolation metal layer is coupled to the ohmic contact region. A first bump is formed on the common metal layer, and a second bump is formed on the isolation metal layer. When the power device is attached to a second substrate, the first bump forms a low inductance ground and heat sink path to the second substrate, and an isolation structure is formed.

A broad-band technique for reducing the distributed inductance of a four-conductor Kelvin cable is disclosed. A special inductance-canceling cable section is connected in tandem with the cable section contacting the cell / battery. Connections between the two cable sections are transposed such that conductors in each conductor pair of the canceling section connect to current-carrying and voltage-sensing conductors from different conductor pairs in the contacting section. The canceling section thereby exhibits a distributed negative mutual inductance between its current-carrying and voltage-sensing conductors that can effectively cancel the distributed positive mutual inductance introduced by the contacting section.In one embodiment, conductor pairs comprise pairs of insulated wires which may be twisted together. In other disclosed embodiments, conductor pairs comprise shielded coaxial cables.

A low inductance electrical machine which may be used as an alternator or motor with low armature inductance is disclosed. Arrangements of complementary armature windings are presented in which the fluxes induced by currents in the armature windings effectively cancel leading to low magnetic energy storage within the machine. This leads to low net flux levels, low core losses, low inductance and reduced tendency toward magnetic saturation. Separately excited field arrangements are disclosed that allow rotor motion to effect brushless alternator or brushless motor operation. An exemplary geometry includes a stator including two toroidal rings and a concentric field coil together with a rotor structure separated from the stator by four air gaps. An alternate embodiment allows for counter-rotation of two rotor elements for use as a flywheel energy storage system in which the external gyroscopic effects cancel.

Methodologies and structures are disclosed for providing multilayer electronic devices having low inductance and high ratings, such as for capacitor devices for uses involving faster pulsing and higher currents. Plural layer devices are constructed for relatively lowered inductance by relatively altering typical orientation of capacitors such that their electrodes are placed into a vertical position relative to an associated circuit board. Optionally, individual leads may be formed so that the resulting structure can be used as an array. Internal electrodes may be arranged for reducing current loops for associated circuits on a circuit board, to correspondingly reduce the associated inductance of the circuit board mounted device. Leads associated with such devices may have added tab-like structures which serve to more precisely place the lead, to improve the lead to capacitor strength, and to promote lower resistance and inductance. Disclosed designs for reducing associated inductance may be practiced in conjunction with various electric devices, including capacitors, resistors, inductors, or varistors.

A capacitor-built-in-type printed wiring substrate which can reliably eliminate noise and attain extremely low resistance and low inductance in connections between an IC chip and the capacitor, and a printed wiring substrate and capacitor for use in the same. A capacitor-built-in-type printed wiring substrate 100 on which an IC chip is mounted includes a capacitor-built-in-type printed wiring substrate 110 and an IC chip 101 mounted on the capacitor-built-in-type printed wiring substrate 110. A printed wiring substrate 120 includes a number of connection-to-IC substrate bumps 152 and a closed-bottomed capacitor accommodation cavity 121 formed therein. A capacitor 130 is disposed in the cavity 121 and includes a pair of electrode groups 133E and 133F and a number of connection-to-IC capacitor bumps 131 connected to either one of the paired electrode groups 133E and 133F. The connection-to-IC capacitor bumps 131 are flip-chip-bonded to corresponding connection-to-capacitor bumps 103 on the IC chip 101. The connection-to-IC substrate bumps 152 are flip-chip-bonded to corresponding connection-to-substrate bumps 104 on the IC chip 101.

Multilayer capacitors incorporate both low inductance (ESL) and controlled Equivalent Series Resistance (ESR) features into a cost-effective unitary device. Internal electrode patterns generally include one or more pairs of mother electrodes adapted for external connection (e.g., to a circuit, another electrical component, circuit board, or other mounting environment), and multiple pairs of daughter electrodes adapted only for internal connection to other electrodes (e.g., other daughter electrodes and / or selected mother electrodes) without direct connection to an external circuit. Mother and daughter electrodes are interdigitated with electrode tab features, where daughter electrodes have internal-connection tabs, and mother electrodes have both internal-connection tabs and circuit-connection tabs, all of which are connected to respective internal-connection or circuit-connection terminals. ESR is increased by the parallel connection between mother and daughter electrodes as well as other optional features such as but not limited to resistive terminations, resistive connectors, serpentine terminations and increased current path lengths.

PCT No. PCT / US96 / 19898 Sec. 371 Date Apr. 21, 1999 Sec. 102(e) Date Apr. 21, 1999 PCT Filed Dec. 12, 1996 PCT Pub. No. WO97 / 21920 PCT Pub. Date Jun. 19, 1997A high power, high energy inductive ignition system with a parallel array of multiple ignition coils Ti (2a, 2b) and associated 600 volt unclamped IGBT power switches Si (8a, 8b), for use with an automotive 12 volt storage battery (1), the system having an internal voltage source (12) to generate a voltage Vc approximately three times the peal primary coil current with coils Ti of low primary inductance of about 0,5 millihenry and of open E-type core structure for spark energy in the range of 120 to 250 mj, the system using a lossless snubber and variable control inductor (6) to provide very high circuit and component efficiency and high coil energy density, in mj / gm, three times that of conventional inductive ignition systems, and high output voltage of 40 kilovolts with fast rise time of 10 microseconds.

A superconducting structure that can operate, for example, as a qubit or a superconducting switch is presented. The structure includes a loop formed from two parts. A first part includes two superconducting materials separated by a junction. The junction can, for example, be a 45° grain boundary junction. The second part can couple the two superconducting materials across the junction. The second part includes a superconducting material coupled to each of the two superconducting materials of the first part through c-axis junctions. Further embodiments of the invention can be as a coherent unconventional superconducting switch, or a variable phase shift unconventional superconductor junction device.

A Class D switching audio amplifier incorporating four state modulation, input-to-output drive and feedback signal isolation, dual topology output filtration, and a low inductance board layout. The four state modulation results in a common mode voltage in the absence of audio. The input-to-output isolation of drive and feedback signals allows for elimination of large power transformers in applications without user-accessible outputs. Such isolation may make use of optical isolators. The output filter includes common mode and differential topology filter stages. The low inductance board layout treats the amplifier and power supply boards as modules, and utilizes both sides of the amplifier board in order to minimize trace length.

A multilayer ceramic capacitor assembly capable of exhibiting low high-frequency inductance and a controlled equivalent series resistance (ESR) while maintaining a useful capacitance value includes respective pluralities of first and second electrode elements interleaved to form a stack. Controlled ESR is achieved either through inclusion of specific types of materials or through alteration of the shape of various component parts. A resistive material may be used in typical end terminations, via terminations, electrode elements or connective tab structures. Additionally, the dielectric may be made lossy so as to enhance resistivity without overly affecting device capacitance. Still further, an additional layer of resistive material may be added to an outer device surface to connect filled-via terminations to end terminations or radial resistive prints may be used to only partially fill the vias. Finally, various electrode element configurations, such as flat plate, serpentine, mesh, L-, O- or U-shaped patterns, may be employed.

A low inductance contact probe comprises conductively coupled plungers. The plungers have coupling means which enable them to be slidably and non-rotatably engaged. A coil spring is attached to the plungers in a manner that prevents rotation of the spring's ends. The spring provides an axial plunger bias, and a torsional bias for conductive coupling between the plungers. The torsional bias is generated by an axial displacement of the spring and by twisting the spring a predetermined angle prior to attachment to the plungers. Torsion-induced contact forces between the plungers assure a direct conductive path through the plungers. The torsional bias further enables a positive attachment of the spring to the plungers. Plungers with hermaphroditic coupling means can be fabricated from a drawn profiled stock by stamping or machining. Essential plunger coupling features can be prefabricated in a drawn profiled stock with a high degree of dimensional accuracy and reproducibility.

An improved persistent current switch design and method of operation are disclosed. By way of example, a persistent current switch circuit comprises a heating element and a switch element located proximate to the heating element, the switch element being substantially formed from a material (by way of example only, titanium) which exhibits a superconducting temperature value below a superconducting temperature value exhibited by a material (by way of example only, aluminum) used to provide a connection to the switch element. The switch element is responsive to the heating element such that the heating element is used to control whether or not the switch element is in a superconducting state. The switch element may also have a folded geometry. Such persistent current switches exhibit low power and low inductance.

An electrical contact having transmission-coil sections with at least two tightly wound turns. Active-coil sections are integral with, and positioned between the transmission-coil sections so as to provide electrical signal communication between the two transmission-coil sections, and spring characteristics. The transmission-coil sections are over coated with a conductive noble metal so as to fuse each of the tightly wound turns together to thereby provide for a shortened electrical transmission pathway through the electrical contact. An LGA interposer for providing data communication between a first and a second array of contact pads is also provided having a dielectric housing with an array of cavities; and a plurality of electrical contacts positioned within the cavities.

The invention provides a film capacitor and its manufacturing method suited to car-mount application, excellent in heat cycle tolerance and humidity resistance, and high in productivity, while maintaining low heat generation and low inductance characteristic. A film capacitor comprises a film capacitor element 1, a bus bar 3 as metal terminal connected to electrode 2 of this film capacitor element 1, and a case 8 for containing them, in which the film capacitor element 1 and bus bar 3 are packed within the case 8 by plural layers of epoxy resin compositions 6, 7, and the plural layers of epoxy resin compositions 6, 7 are formed in layers, and are composed so that the coefficient of linear expansion may be smallest in the epoxy resin composition 7 disposed in the uppermost layer, and therefore resin cracks can be prevented at the time of heat cycle, and a film capacitor of high reliability excellent inhumidity resistance is obtained.

A probe assembly suitable for high-current measurements of an electrical device.

A method and apparatus for tuning and matching extremely small sample coils with very low inductance for use in magnetic resonance experiments conducted at low frequencies. A circuit is disclosed that is appropriate for performing measurements in fields where magnetic resonance is beneficially utilized. The circuit has a microcoil, an adjustable tuning capacitance, and added inductance in the form of a tuning inductor. The microcoil is an electrical coil having an inductance of about 25 nanohenries (nH) or less. Because additional inductance is purposefully added, the capacitance required for resonance and apparatus function is proportionally and helpfully reduced. The apparatus and method permit the resonant circuit and the magnet to be made extremely small, which is crucial for new applications in portable magnetic resonance imaging, for example.

In a power converter in which semiconductor modules are arranged on both surfaces of a cooler for downsizing, an excellent connection between control boards and a low inductance connection between smoothing capacitors and the semiconductor modules are performed at the same time. The semiconductor modules are disposed on both surfaces of the cooler, and control boards that control the semiconductor modules are arranged opposite to the respective semiconductor modules. The semiconductor modules and the cooler are held between the control boards. A current detector or a terminal block is disposed at a position perpendicular to a surface on which the cooler and the semiconductor modules contact each other, opposite to the cooler. The respective control boards disposed on both surfaces of the cooler are electrically connected by using wirings provided in the current detector or the terminal block.

A busbar assembly for an inverter module has a power module, a capacitor module with at least one capacitor, and a battery all interconnected by a busbar. The busbar includes a base busbar portion that is electrically coupled to the battery and a branch busbar portion that extends from the base busbar to the power module and that electrically connects to the capacitor module at points located between the base node and the power module.

An inductively coupled plasma source is provided with a peripheral ionization source for producing a high-density plasma in a vacuum chamber for semiconductor wafer coating or etching. The source includes a segmented configuration having high and low radiation segments and produces a generally ring-shaped array of energy concentrations in the plasma around the periphery of the chamber. Energy is coupled from a segmented low inductance antenna through a dielectric window or array of windows and through a segmented shield or baffle. The antenna has concentrated conductor segments through which current flows in one or more small cross-section conductors to produce high magnetic fields that couple through the high-transparency shield segments into the chamber, while alternating distributed conductor segments, formed of large cross-section conductor portions or diverging small conductor sections, permit magnetic fields to pass through or between the conductors and deliver only weak fields, which are aligned with opaque shield sections and couple insignificant energy to the plasma. The source provides spatial control of plasma energy distribution, which aids in control of the uniformity of plasma processing across the surface of the semiconductor being processed.

The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.

A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.

A capacitor-built-in-type printed wiring substrate which can reliably eliminate noise and attain extremely low resistance and low inductance in connections between an IC chip and the capacitor, and a printed wiring substrate and capacitor for use in the same. A capacitor-built-in-type printed wiring substrate 100 on which an IC chip is mounted includes a capacitor-built-in-type printed wiring substrate 110 and an IC chip 101 mounted on the capacitor-built-in-type printed wiring substrate 110. A printed wiring substrate 120 includes a number of connection-to-IC substrate bumps 152 and a closed-bottomed capacitor accommodation cavity 121 formed therein. A capacitor 130 is disposed in the cavity 121 and includes a pair of electrode groups 133E and 133F and a number of connection-to-IC capacitor bumps 131 connected to either one of the paired electrode groups 133E and 133F. The connection-to-IC capacitor bumps 131 are flip-chip-bonded to corresponding connection-to-capacitor bumps 103 on the IC chip 101. The connection-to-IC substrate bumps 152 are flip-chip-bonded to corresponding connection-to-substrate bumps 104 on the IC chip 101.

A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic / superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

Devices and systems comprising driver circuits are disclosed for MOSFET driven, normally-on gallium nitride (GaN) power transistors. Preferably, a low power, high speed CMOS driver circuit with an integrated low voltage, lateral MOSFET driver is series coupled, in a hybrid cascode arrangement to a high voltage GaN HEMT, for improved control of noise and voltage transients. Co-packaging of a GaN transistor die and a CMOS driver die using island topology contacts, through substrate vias, and a flip-chip, stacked configuration provides interconnections with low inductance and resistance, and provides effective thermal management. Co-packaging of a CMOS input interface circuit with the CMOS driver and GaN transistor allows for a compact, integrated CMOS driver with enhanced functionality including shut-down and start-up conditioning for safer operation, particularly for high voltage and high current switching. Preferred embodiments also provide isolated, self-powered, high speed driver devices, with reduced input losses.