117 results about "Superconducting circuits" patented technology

A method for reducing interference, comprising receiving a wideband signal, having at least one large amplitude component; adaptively modifying the wideband signal with respect to at least one high intensity component without substantial introduction of non-linear distortion, while reducing a residual dynamic range thereof; digitizing the modified wideband signal to capture information describing at least the high intensity signal at a sampling rate sufficient to extract modulated information present within the wideband signal at an upper limit of the band. The system analyzes a spectral characteristic of the wideband signal; and extracts adaptation parameters for the adaptive filtering. The system therefore provides both large net dynamic range and wideband operation. Preferably, the digitizer and filter, and part of the spectral characteristic analyzer is implemented in using superconducting circuit technology, with, for example low temperature superconducting digital signal processing components, and high temperature superconducting analog filtering components.

A superconducting circuit device of a voltage-type logic device is large in current driving capability and, accordingly, electric power consumption; however, the switching speed is not so fast, and a superconducting circuit device of a fluxoid-type logic device is small in current driving capability and, accordingly, the electric power consumption; however the switching speed is faster than that of the superconducting circuit device of the voltage-type logic device, wherein the superconducting circuit device of the voltage-type logic device and the superconducting circuit device of the fluxoid-type logic device are selectively used in a superconducting circuit such as a superconducting random access memory, a superconducting NOR circuit and a superconducting signal converting circuit so as to realize small electric power consumption and high-speed switching action.

A method for reducing interference, comprising receiving a wideband signal, having at least one large amplitude component; adaptively modifying the wideband signal with respect to at least one high intensity component without substantial introduction of non-linear distortion, while reducing a residual dynamic range thereof; digitizing the modified wideband signal to capture information describing at least the high intensity signal at a sampling rate sufficient to extract modulated information present within the wideband signal at an upper limit of the band. The system analyzes a spectral characteristic of the wideband signal; and extracts adaptation parameters for the adaptive filtering. The system therefore provides both large net dynamic range and wideband operation. Preferably, the digitizer and filter, and part of the spectral characteristic analyzer is implemented in using superconducting circuit technology, with, for example low temperature superconducting digital signal processing components, and high temperature superconducting analog filtering components.

A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic / superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.

A high power high temperature superconductive circuit for use in various microwave devices including filters, dielectric resonator filters, multiplexers, transmission lines, delay lines, hybrids and beam-forming networks has thin gold films deposited either on a substrate or on top of the high temperature superconductive film. Alternatively, other metal films can be used or a plurality of dielectric films can be used or a dielectric constant gradient substrate can be used. The use of these materials in a part or parts of a microwave circuit reduces the current density in those parts compared to the level of current density if only high temperature superconductive film is used. This increases the power handling capability of the circuit.

A superconducting circuit includes a first transformer to produce a first alternating-current output at a secondary-side inductor, a second transformer to produce a second alternating-current output at a secondary-side inductor, a first pulse generating circuit to produce a single flux quantum pulse responsive to the first alternating-current output, a second pulse generating circuit to produce a single flux quantum pulse responsive to the second alternating-current output, and a confluence buffer circuit to merge the single flux quantum pulses from the pulse generating circuits, wherein each of the pulse generating circuits includes a superconducting loop including the secondary-side inductor, a first Josephson junction situated in the superconducting loop to generate the single flux quantum pulse, and a second Josephson junction situated in the superconducting loop, a threshold value of the second Josephson junction for an electric current flowing through the secondary-side inductor being different from that of the first Josephson junction.

In one aspect, fabricating a superconductive integrated circuit with a Josephson junction includes applying oxygen or nitrogen to at least part of a structure formed from an outer superconductive layer to passivate an artifact, if any, left from removing the portion of the outer superconductive layer. In another aspect, a first superconductive layer is deposited, a second superconductive layer is deposited on the first superconductive layer, an oxide layer is formed on the first superconductive layer, a dielectric layer is deposited on the oxide layer, a portion of the dielectric layer is removed, a first portion of the oxide layer is removed, a second oxide portion is formed in place of the first portion of the oxide layer, and a third superconductive layer is deposited on the dielectric layer and the second oxide portion.

Supercooled electronics often use Rapid Single Flux Quantum (RSFQ) digital circuits. The output voltages from RSFQ devices are too low to be directly interfaced with semiconductor electronics, even if the semiconductor electronics are cooled. Techniques for directly interfacing RSFQ digital circuits with semiconductor electronics are disclosed using a novel inverting transimpedance digital amplifier in conjunction with a non-inverting transimpedance digital amplifier to create a differential transimpedance digital amplifier that permits direct interfacing between RSFQ and semiconductor electronics.

A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.

The invention provides a superconducting magnet which comprises a vacuum container and a refrigerator. A cold screen and a superconducting coil are arranged in the vacuum container; superconducting wires are wound on a coil framework to form the superconducting coil, and two free ends of the superconducting coil are connected with a superconducting switch by superconducting connectors to form a closed superconducting circuit; the refrigerator is arranged on the vacuum container and comprises a primary cold head and a secondary cold head, and the primary cold head is thermally connected with the cold screen; the superconducting wires are made of superconducting materials with critical superconducting transit temperatures higher than 35 K; the superconducting connectors are made of superconducting welding flux with a low melting point, can be cooled by the aid of the secondary cold head or cooling media and accordingly can be assuredly in superconducting states. Compared with low-temperature closed-loop superconducting magnets in the prior art, the superconducting magnet has the advantage of high superconducting stability.

A superconducting system that includes an interface circuit capable of making the best use of a high-speed superconducting circuit and a high-speed semiconductor circuit. A multi-chip module in which an Nb superconducting circuit having josephson junctions formed by the use of Nb and an oxide high-temperature superconducting latch interface circuit having josephson junctions formed by the use of an oxide high-temperature superconductor are connected is located in a low temperature environment kept at 4.2 K. The oxide high-temperature superconducting latch interface circuit is connected to a high-speed semiconductor amplifier and a signal outputted from the Nb superconducting circuit is transmitted to the high-speed semiconductor amplifier. As a result, the limit of the operation speed of the oxide high-temperature superconducting latch interface circuit is raised and the superconducting system including the interface circuit capable of making the best use of both the high-speed Nb superconducting circuit and the high-speed semiconductor amplifier is realized.

A new family of superconducting materials with critical temperature up to 55 K have recently been discovered, comprising a crystal structure with atomic layers of iron and arsenic alternating with atomic layers of rare-earth oxide or alkaline earth. The present invention identifies structures for integrated circuit elements (including Josephson junctions) in these and related materials. These superconducting circuit elements will operate at a higher temperature than low-temperature superconductors such as niobium, and may be easier to manufacture than prior-art high-temperature superconductors based on copper-oxides.

The invention discloses a superconducting circuit structure, a superconducting quantum chip and a superconducting quantum computer, and relates to the field of quantum computing. The superconducting circuit structure comprises the components of: at least two quantum bits; a connecting assembly which is respectively coupled with the two quantum bits and is used for realizing transverse field coupling between the connecting assembly and the two quantum bits; and a coupling device which is respectively coupled with the two quantum bits and is used for realizing longitudinal field coupling betweenthe coupling device and the two quantum bits. Therefore, sigma z sigma z parasitic coupling between the quantum bits is efficiently eliminated, and two quantum bit gates with high fidelity are realized.

Supercooled electronics often use Rapid Single Flux Quantum (RSFQ) digital circuits. The output voltages from RSFQ devices are too low to be directly interfaced with semiconductor electronics, even if the semiconductor electronics are cooled. Techniques for directly interfacing RSFQ digital circuits with semiconductor electronics are disclosed using a novel inverting transimpedance digital amplifier in conjunction with a non-inverting transimpedance digital amplifier to create a differential transimpedance digital amplifier that permits direct interfacing between RSFQ and semiconductor electronics.

The invention discloses a high-fidelity superconducting circuit structure, a superconducting quantum chip and a superconducting quantum computer, and relates to the field of quantum computing. According to the specific implementation scheme, quantum bits are calculated; the coupling device is used for being coupled with the two calculation quantum bits; the connection assembly is arranged betweenthe calculation quantum bit and the coupling device and is used for carrying out coupling connection on the calculation quantum bit and the coupling device so as to realize a target quantum gate basedon the coupling device and the calculation quantum bit; in this way, parasitic coupling between the calculation quantum bits is eliminated by selecting reasonable superconducting circuit parameters,and the fidelity of the target quantum gate is improved.

The present invention discloses a preparation method of a superconductive Josephson junction. belonging to the field of superconducting circuit elements. The method comprises the steps of: 1) performing preprocessing of a substrate, and obtaining a clean substrate; 2) performing electron beam exposure: coating electron beam glue on the substrate, and employing an electron beam exposure device to expose an area A and a area B on the substrate, wherein an area C is arranged at the intersection of the area A and the area B; 3) performing development: putting a container holding developing solventinto liquid, monitoring a temperature of the developing solvent, immersing the substrate obtained in the step 2) into the developing solvent and performing shaking development when the temperature ofthe developing solvent reaches a fitting temperature and is stably remained at the temperature, and then performing fixing, and allowing a figured formed by the electron beam glue to be stabilized; 4) performing inclined evaporation coating twice; 5) performing metal peeling. The preparation method of the superconductive Josephson junction employs an electron beam exposure mark technology and anelectron beam coating and metal peeling technologies, is relatively simple in process, avoids a complex suspension colloid preparation process and can perform batch preparation of superconductive Josephson junction samples in one day.

A superconducting current pump arranged to cause a DC electrical current to flow through a superconducting circuit accommodated within a cryogenic enclosure of a cryostat comprises a rotor external to the cryogenic enclosure and a stator within the cryogenic enclosure, the rotor and stator separated by a gap through which passes a thermally insulating wall of the cryogenic enclosure, the rotor and the stator comprising at least in part a ferromagnetic material to concentrate magnetic flux in a magnetic circuit across the gap between the rotor and the stator and through the wall, so that movement of the rotor external to the cryogenic enclosure relative to the stator within the cryogenic enclosure induces a DC transport current to flow around the superconducting circuit within the cryogenic enclosure. There is no coupling between a drive motor external to the cryogenic enclosure and an internal rotor which may introduce a path for heat leakage into the cryostat, in turn increasing the heat load and thus increasing the cooling power required to maintain the cold components within the cryogenic enclosure at the low operating temperature required.

The embodiment of the invention provides a superconducting circuit structure, a superconducting quantum chip and a superconducting quantum computer, and the superconducting circuit structure comprisesat least two basic units and a coupling structure, wherein the basic unit at least comprises a quantum bit and a resonant cavity coupled with the longitudinal field of the quantum bit, the resonant cavity comprises a first inductor and a first capacitor connected with the first inductor in parallel, and the resonant cavity and the quantum bit are subjected to longitudinal field coupling by utilizing the first inductor; and the coupling structure is used for coupling the resonant cavities in the two basic units so as to realize linear coupling between the two basic units. Thus, the problem ofcrosstalk among the quantum bits is solved, and the purposes of simple structure, easiness in regulation and control and expandability of the superconducting circuit are achieved on the basis of no crosstalk among the quantum bits.

A prior-art electronic circuit component comprising an insulating film and a circuit conductive layer made of a superconducting metal suffers low reliability resulting from insufficient adhesion between these layers. An electronic circuit component of the invention comprises an insulating film made of a high polymer material having a dielectric constant of 2.5 or less, a base metal layer formed of copper on the insulating film, having a thickness of 0.01 to 0.3 mu m, and a circuit conductive layer formed of at least one of niobium and niobium nitride on the base metal layer. The electronic circuit component of the invention can accomplish an increased adhesion between the insulating film and the circuit conductive layer. Furthermore, by sequentially forming, on the circuit conductive layer, a conductive-layer coating metal layer made of at least one of aluminum and copper, the insulating film, the base metal layer and the circuit conductive layer, there can be obtained a multi-layered circuit substrate with a superconducting circuit of high density and high-level function.

Systems and methods for suppressing magnetically active surface defects in superconducting quantum circuits are provided. A method includes providing one or more superconducting quantum circuits, and arranging the one or more superconducting quantum circuits in a hermetic enclosure capable of isolating the one or more superconducting circuits from ambient surroundings. The method also includes controlling an environment in the hermetic enclosure to suppress magnetically active surface defects associated with the one or more superconducting quantum circuits. In some aspects, the method further includes introducing an inert gas into the hermetic enclosure to passivate a surface of the one or more superconducting quantum circuits. In other aspects, the method further includes coating a surface of the one or more superconducting circuits with a non-magnetic encapsulation layer. In yet other aspects, the method further includes irradiating the one or more superconducting circuits using ultraviolet light.

The invention discloses a superconducting circuit structure, a superconducting quantum chip and a superconducting quantum computer, and relates to the field of quantum calculation. According to the specific implementation scheme, the superconducting circuit structure comprises at least three calculation quantum bits; the bus qubit is connected with the calculation qubits, and equivalent coupling is generated between any two calculation qubits connected through the bus qubit; the coupling quantum bit is arranged between the calculation quantum bit and the bus quantum bit, connects the calculation quantum bit with the bus quantum bit and is used for regulating and controlling the coupling strength between the calculation quantum bit and the bus quantum bit; coupling between any two calculation quantum bits can be achieved, then quantum gate operation between any two calculation quantum bits is achieved, and meanwhile crosstalk between the calculation quantum bits can be effectively restrained.

The invention discloses a high-fidelity superconducting circuit structure, a superconducting quantum chip and a superconducting quantum computer, and relates to the field of quantum computing. According to the specific implementation scheme, quantum bits are calculated; the coupling device is used for being coupled with the two calculation quantum bits; the connection assembly is arranged betweenthe calculation quantum bit and the coupling device and is used for carrying out coupling connection on the calculation quantum bit and the coupling device so as to realize a target quantum gate basedon the coupling device and the calculation quantum bit; wherein the calculation quantum bit and the detuning intensity of the coupling device are positive values. In this way, parasitic coupling between the calculation quantum bits is eliminated by selecting reasonable superconducting circuit parameters, and the fidelity of the target quantum gate is improved.

A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic / superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.

The present invention relates to an inductive dipole element for a superconducting microwave quantum circuit. The dipole element comprises a DC-SQUID formed by a pair of Josephson junctions shunted by an inductance, wherein the Josephson junctions have equal energy, and the Josephson junctions and the inductance are arranged such that each of the junctions forms a loop with the inductance. The two loops are asymmetrically threaded with external magnetic DC fluxes φext1 and φext2, respectively, such that φext1=π and φext2=0, wherein parametric pumping is enabled by modulating the total flux φΣ=φext,1+φext,2 threading the dipole element, thereby allowing even-wave mixing between modes that participate in the dipole element with no Kerr-like interactions.

A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.

A first Josephson junction in a Single Flux Quantum circuit (SFQ circuit) and a second Josephson junction in an interface circuit (latch driver circuit) are formed with junction materials different from each other, and the junction materials are selected so that the hysteresis of the first Josephson junction in a current-voltage characteristic is smaller than the hysteresis of the second Josephson junction in a current-voltage characteristic.

The invention discloses a superconducting circuit architecture comprising a plurality of coupling devices, a superconducting quantum chip and a superconducting quantum computer, and relates to the technical field of quantum computing. The circuit comprises a first quantum bit, a second quantum bit, a first coupling device and a second coupling device, the first coupling device is coupled with thefirst quantum bit and the second quantum bit through a first connecting piece; the second coupling device is coupled with the first quantum bit and the second quantum bit through a second connecting piece; and the frequencies of the first quantum bit and the second quantum bit are between the frequency of the first coupling device and the frequency of the second coupling device, and the nonlinearstrength of the first coupling device is opposite to the nonlinear strength of the second coupling device in sign. According to the technical scheme of the invention, parasitic coupling between quantum bits in the superconducting circuit can be eliminated, and the fidelity of a single-bit quantum gate and a two-bit quantum gate realized in the superconducting circuit is improved.