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70 results about "Consistency model" patented technology
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In computer science, consistency models are used in distributed systems like distributed shared memory systems or distributed data stores (such as a filesystems, databases, optimistic replication systems or web caching). The system is said to support a given model if operations on memory follow specific rules. The data consistency model specifies a contract between programmer and system, wherein the system guarantees that if the programmer follows the rules, memory will be consistent and the results of reading, writing, or updating memory will be predictable. This is different from coherence, which occurs in systems that are cached or cache-less, and is consistency of data with respect to all processors. Coherence deals with maintaining a global order in which writes to a single location or single variable are seen by all processors. Consistency deals with the ordering of operations to multiple locations with respect to all processors.
Shared memory multiprocessor memory model verification system and method
InactiveUS6892286B2Memory architecture accessing/allocationMemory adressing/allocation/relocationPrecedence graphMulti processor
A system and method for verifying a memory consistency model for a shared memory multiprocessor computer systems generates random instructions to run on the processors, saves the results of the running of the instructions, and analyzes the results to detect a memory subsystem error if the results fall outside of the space of possible outcomes consistent with the memory consistency model. A precedence relationship of the results is determined by uniquely identifying results of a store location with each result distinct to allow association of a read result value to the instruction that created the read result value. A precedence graph with static, direct and derived edges identifies errors when a cycle is detected that indicates results that are inconsistent with memory consistency model rules.
Owner:ORACLE INT CORP
Multistream processing memory-and barrier-synchronization method and apparatus
ActiveUS7437521B1Memory architecture accessing/allocationProgram synchronisationFile synchronizationProcess memory
A method and apparatus to provide specifiable ordering between and among vector and scalar operations within a single streaming processor (SSP) via a local synchronization (Lsync) instruction that operates within a relaxed memory consistency model. Various aspects of that relaxed memory consistency model are described. Further, a combined memory synchronization and barrier synchronization (Msync) for a multistreaming processor (MSP) system is described. Also, a global synchronization (Gsync) instruction provides synchronization even outside a single MSP system is described. Advantageously, the pipeline or queue of pending memory requests does not need to be drained before the synchronization operation, nor is it required to refrain from determining addresses for and inserting subsequent memory accesses into the pipeline.
Owner:CRAY
Verification of memory consistency and transactional memory
Owner:ORACLE INT CORP
Method and system for efficient emulation of multiprocessor memory consistency
InactiveUS20040078186A1Strong consistencyMemory architecture accessing/allocationProgram synchronisationMulti processorHost machine
A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.
Owner:IBM CORP
Verification of memory consistency and transactional memory
ActiveUS20080288834A1Efficiently verifying complianceError detection/correctionStatic storageProcessing elementTest platform
A system for efficiently verifying compliance with a memory consistency model includes a test module and an analysis module. The test module may coordinate an execution of a multithreaded test program on a test platform. If the test platform provides an indication of the order in which writes from multiple processing elements are performed at shared memory locations, the analysis module may use a first set of rules to verify that the results of the execution correspond to a valid ordering of events according to a memory consistency model. If the test platform does not provide an indication of write ordering, the analysis module may use a second set of rules to verify compliance with the memory consistency model. Further, a backtracking search may be performed to find a valid ordering if such ordering exists or show that none exists and, hence, confirm whether or not the results comply with the given memory consistency model.
Owner:ORACLE INT CORP
Relaxed memory consistency model
ActiveUS8307194B1Conditional code generationProgram synchronisationData synchronizationClock synchronization
A method and apparatus to provide specifiable ordering between and among vector and scalar operations within a single streaming processor (SSP) via a local synchronization (Lsync) instruction that operates within a relaxed memory consistency model. Various aspects of that relaxed memory consistency model are described. Further, a combined memory synchronization and barrier synchronization (Msync) for a multistreaming processor (MSP) system is described. Also, a global synchronization (Gsync) instruction provides synchronization even outside a single MSP system is described. Advantageously, the pipeline or queue of pending memory requests does not need to be drained before the synchronization operation, nor is it required to refrain from determining addresses for and inserting subsequent memory accesses into the pipeline.
Owner:CRAY
Text generation image method based on cross-modal similarity and generative adversarial network
ActiveCN110490946AImprove image generationImprove retrieval performanceTexturing/coloringCharacter and pattern recognitionPattern recognitionGenerative adversarial network
The invention relates to a text generation image method based on cross-modal similarity and a generative adversarial network. The method comprises the steps that S1, training a global consistency model, a local consistency model and a relation consistency model by using matched and unmatched data, wherein three models are used for obtaining global representation, local representation and relationrepresentation of a text and an image respectively; S2, obtaining global representation, local representation and relation representation of the to-be-processed text by utilizing the trained global consistency model, local consistency model and relation consistency model; S3, connecting the global representation, the local representation and the relation representation of the to-be-processed textin series to obtain text representation of the to-be-processed text; S4, converting the text representation of the to-be-processed text into a condition vector by utilizing an Fca condition enhancement module; and S5, inputting the condition vector into a generator to obtain a generated image. Compared with the prior art, the method has the advantages of considering local and relation informationand the like.
Owner:TONGJI UNIV
Load store buffer agnostic to threads implementing forwarding from different threads based on store seniority
InactiveUS20150205605A1Maintaining memory consistencyMemory architecture accessing/allocationRuntime instruction translationProcessor registerSemantics
In a processor, a thread agnostic unified store queue and a unified load queue method for out of order loads in a memory consistency model using shared memory resources. The method includes implementing a memory resource that can be accessed by a plurality of asynchronous cores, wherein the plurality of cores share a unified store queue and a unified load queue; and implementing an access mask that functions by tracking which words of a cache line are accessed via a load, wherein the cache line includes the memory resource, wherein the load sets a mask bit within the access mask when accessing a word of the cache line, and wherein the mask bit blocks accesses from other loads from a plurality of cores. The method further includes checking the access mask upon execution of subsequent stores from the plurality of cores to the cache line, wherein stores from different threads can forward to loads of different threads while still maintaining in order memory consistency semantics; and causing a miss prediction when a subsequent store to the portion of the cache line sees a prior mark from a load in the access mask, wherein the subsequent store will signal a load queue entry corresponding to that load by using a tracker register and a thread ID register.
Owner:INTEL CORP
Method for quickly extracting building three-dimensional outline information in onboard LiDAR (light detection and ranging) data
The invention discloses a novel method for extracting building three-dimensional outline information by utilizing a stripe division method to quickly filter onboard LiDAR (light detection and ranging) point cloud data, and based on a random sampling consistency model. In the method, in allusion to high precision of the onboard LiDAR data per se, the mass onboard LiDAR point cloud data is directly processed; the method comprises the steps as follows: firstly performing classification filtering on the onboard LiDAR three-dimensional point cloud data through two-time stripe division in X direction and Y direction, so as to distinguish ground points from non-ground points; then performing triangulation on the non-ground three-dimensional point cloud data, and dividing building roof surface patches through the combination with the classification result, extracting LiDAR point sets contained in each building, and then, obtaining a edge point set of each building through edge tracking; and finally, using the random sampling consistency model to extract building edge straight lines from the edge point sets and form a building outline characteristic curve, so as to meet working requirements of digital city three-dimensional modeling and the like.
Owner:李慧盈 +2
System and method for efficient verification of memory consistency model compliance
ActiveUS7779393B1Reduce the number of traversalsImprove efficiencyError detection/correctionSpecific program execution arrangementsProcessing elementTest platform
A system for efficiently verifying compliance with a memory consistency model includes a test module and an analysis module. The test module may coordinate an execution of a multithreaded test program on a test platform. If the test platform provides an indication of the order in which writes from multiple processing elements are performed at shared memory locations, the analysis module may use a first set of rules to verify that the results of the execution correspond to a valid ordering of events according to a memory consistency model. If the test platform does not provide an indication of write ordering, the analysis module may use a second set of rules to verify compliance with the memory consistency model.
Owner:ORACLE INT CORP
Open-circuit fault diagnosis method and system for converter
ActiveCN109406935AReduce maintenance difficultyReduce maintenance costsElectrical testingDiagnosis methodsFault occurrence
The invention, which relates to the field of circuit fault diagnosis, discloses an open-circuit fault diagnosis method and system for a converter, thereby diagnosing open-circuit faults of one kind ofconverters having the same bridge arm structures and thus improving the versatility of the diagnosis method and reducing the maintenance difficulty and cost of the converter effectively. The method comprises: selecting circuit topologies of any bridge arm of a to-be-detected converter in a normal working sate and an open-circuit fault state and establishing a first consistency model; according tothe first consistency model, building a fourth consistency model that is suitable for the normal working sate and the open-circuit fault state of the converter; simulating the operating state of theconverter by using the fourth consistency model, calculating a voltage residual based on an actual phase voltage value and an estimated phase voltage value, and constructing a residual evaluation function according to the voltage residual; comparing the output value of the residual evaluation function with a set residual detection threshold; and determining an open-circuit fault of the bridge armunder the condition of meeting a set fault occurrence condition by the comparison result.
Owner:CENT SOUTH UNIV
Recommendation method of semi-supervised learning based on graph consistency model
InactiveCN104679866ARealize personalized recommendationMeasure similarityCharacter and pattern recognitionSpecial data processing applicationsLearning basedPersonalization
The invention discloses a recommendation method of the semi-supervised learning based on a graph consistency model. The recommendation method comprises the following steps: S1 obtaining a server data set, constructing the graph consistency model for the data set, and establishing data points and sides; S2 measuring the similarity of two data points through a mapping function, and giving a weighted value to the side which exists between the data points; S3 establishing and solving an objective function, and sorting solutions of the objective function; S4 performing convergence proof on the sorted solutions of the objective function, so as to obtain a recommendation list, and sending the recommendation list to a user terminal. According to the recommendation method, personalized recommendation of user behavior information and article content information can be realized.
Owner:CHONGQING UNIV OF TECH
Method for establishing model for rapidly detecting quality of synthetic borneol through near infrared reflectance spectroscopy
ActiveCN104076012AEase of industrial productionQuick checkMaterial analysis by optical meansPhysical well beingCombinatorial chemistry
Owner:HENAN UNIV OF CHINESE MEDICINE
High efficiency simulating method and system for multiprocessor storage consistency
InactiveCN1492324AMemory architecture accessing/allocationProgram synchronisationMulti processorHandling system
A method (and system) of emulation in a multiprocessor system, includes performing an emulation in which a host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports a strong consistency model.
Owner:INT BUSINESS MASCH CORP
Method for detecting self-adaptive growth of a plurality of dim target tracks in image domain
ActiveCN101872484AReduce the impactImpact Mitigation of Edge DetectionImage analysisSkeletonizationImage domain
The invention discloses a method for detecting self-adaptive growth of a plurality of weak target tracks in an image domain, which relates to the field of tracking of moving targets and mainly solves the problem that the existing method is difficult to detect a plurality of moving target curve tracks under the condition of low signal-to-noise ratio. The method comprises the following detection processes: firstly, on the basis of processing radar echoes to acquire a distance-time image, extracting edges based on a phase consistency model; then, by adopting a digital image processing method for the edge detection result, realizing the purposes of positioning edge centers, removing fake edges and communicating the connected regions with the consistent edge trend through skeletonization and self-adaptive region growth technology; and finally, estimating target moving tracks and moving parameters by combining a clearing method and a iterative least squares method. The invention has the advantage of being capable of accurately estimating the track parameters of a plurality of curves, and can be applied to the data processing field of monitoring systems such as radars and the like to realize high-speed weak target detection and tracking.
Owner:XIAN CETC XIDIAN UNIV RADAR TECH COLLABORATIVE INNOVATION INST CO LTD
Lock-based and synch-based method for out of order loads in a memory consistency model using shared memory resources
InactiveUS20150095588A1Memory architecture accessing/allocationRuntime instruction translationProcessor registerShared memory
In a processor, a lock-based method for out of order loads in a memory consistency model using shared memory resources. The method includes implementing a memory resource that can be accessed by a plurality of cores; and implementing an access mask that functions by tracking which words of a cache line are accessed via a load, wherein the cache line includes the memory resource, wherein the load sets a mask bit within the access mask when accessing a word of the cache line, and wherein the mask bit blocks accesses from other loads from a plurality of cores. The method further includes checking the access mask upon execution of subsequent stores from the plurality of cores to the cache line; and causing a miss prediction when a subsequent store to the portion of the cache line sees a prior mark from a load in the access mask, wherein the subsequent store will signal a load queue entry corresponding to that load by using a tracker register and a thread ID register.
Owner:INTEL CORP
Text consistency calculation method and device
ActiveCN110188350ASolve technical problemsAccurately assess qualitySemantic analysisCharacter and pattern recognitionSemantic vectorCalculation methods
The invention provides a text consistency calculation method and device. The method comprises the steps of obtaining an article to be processed; extracting a plurality of sentences related to the title from the text; for each sentence in the plurality of sentences, inputting the sentence and the title into a preset semantic consistency model, and obtaining a semantic vector corresponding to the sentence; determining a semantic vector corresponding to the article according to the semantic vector corresponding to each sentence; for each sentence combination in the plurality of sentences, inputting the sentence combination into a preset logic consistency model, obtaining a logic label corresponding to the sentence combination, and determining a logic vector corresponding to the article according to the logic label corresponding to each sentence combination; and according to the logic vector and the semantic vector, determining the text consistency value of the article. According to the method, the quality of the text can be accurately evaluated on the basis of the semantic consistency and the logic consistency of the text, meanwhile, a user can be helped to evaluate and assist the writing quality, and the use experience of the user is improved.
Owner:BEIJING BAIDU NETCOM SCI & TECH CO LTD
Blind detection system for digital image tampering
InactiveCN104616276AResistance to the effects of human interferenceImprove detection efficiencyImage analysisFeature extractionImaging Feature
The invention discloses a blind detection system for digital image tampering, belongs to the field of image information security, and particularly relates to the blind detection system for the digital image tampering. The invention provides the blind detection system for the digital image tampering, which can effectively resist geometric attacks and is high in detection efficiency and detection precision. The blind detection system comprises the following steps: (1) carrying out image feature extraction, and establishing a consistency model; (2) carrying out an image blind forensics algorithm; (3) carrying out image classification and blind-revision image positioning; and (4) outputting a result.
Owner:沈阳普日软件技术有限公司
Dynamic brain network node consistent-behavior analysis method based on electroencephalogram signals
InactiveCN110338785ASolve the impact of consistent behaviorImprove consistencyDiagnostic recording/measuringSensorsDiscriminantBrain network
The invention discloses a dynamic brain network node consistent-behavior analysis method based on electroencephalogram signals. According to the dynamic brain network node consistent-behavior analysismethod based on electroencephalogram signals, a brain function network based on electroencephalogram signals is constructed by performing preprocessing and reprocessing on electroencephalogram signals; a complex dynamic brain network consistency model is constructed on basis of electroencephalogram signals; and then, a complex dynamic brain network model consistent-behavior discriminant is constructed so as to judge consistency and stability of brain network node behaviors. The dynamic brain network node consistent-behavior analysis method based on electroencephalogram signals can be used toverify consistency of complex dynamic behaviors of brain network nodes.
Owner:TAIYUAN UNIV OF TECH
Consistency model building method based on 3-dimensional quantitative structure-activity relationship model
InactiveCN104834831AQuality improvementQuick discoverySpecial data processing applicationsEntity–relationship modelRelational model
The invention relates to a building method of a 3-dimensional quantitative structure-activity relationship (3D-QSAR) model, in particular to building of the 3D-QSAR model based on HIV-1 inhibitor molecules and consistency model building, and belongs to the technical field of biological information. The HIV-1 inhibitor molecules are selected to perform 3D-QSAR and consistency model research so as to mine the relationship between the structure of an inhibitor and the anti-HIV activity of the inhibitor. According to the method, the bioactivities of compounds with similar structures are predicted through building of a mathematical model based on the chemical characteristics (such as hydrophilcity, hydrophobicity, electrostatic property, polarity and three-dimensional structure) of the inhibitor. A consistency model is built with a statistics method on the basis of three 3D-QSAR models, and the aim is to further enhance the prediction capability of the model. The obtained model can better predict the anti-HIV activities of compounds, and the prediction accuracy of the anti-HIV activity of a brand new compound is increased. Compared with other methods, the method has the advantages that the medicament discovery efficiency is increased, and the medicament discovery cost is reduced.
Owner:BEIJING UNIV OF TECH
Semaphore method and system with out of order loads in a memory consistency model that constitutes loads reading from memory in order
InactiveUS20150100734A1Memory architecture accessing/allocationProgram control using stored programsProcessor registerConsistency model
In a processor, a method for using a semaphore with out of order loads in a memory consistency model that constitutes loads reading from memory in order. The method includes implementing a memory resource that can be accessed by a plurality of cores; implementing an access mask that functions by tracking which words of a cache line have pending loads, wherein the cache line includes the memory resource, wherein an out of order load sets a mask bit within the access mask when accessing a word of the cache line, and clears the mask bit when that out of order load retires. The method further includes checking the access mask upon execution of subsequent stores from the plurality of cores to the cache line; and causing a miss prediction when a subsequent store to the portion of the cache line sees a prior mark from a load in the access mask, wherein the subsequent store will signal a load queue entry corresponding to that load by using a tracker register.
Owner:INTEL CORP
Consistency Model for Object Management Data
A method and apparatus are provided for maintaining cache coherency of object management data in a computer system. The computer system is configured with a bit mask to represent changes in object management data. All changes in an object are reflected by setting an associated bit in the bit mask. A cache update of object management data is limited to the bit(s) set in the bit mask.
Owner:IBM CORP
Cascading fault-tolerant processing method adaptive to CPU and GPU heterogeneous cluster
ActiveCN107506261AQuick reset serviceReduce lossesInterprogram communicationRedundant operation error correctionBusiness PersonnelData operations
The invention relates to a cascading fault-tolerant processing method adaptive to a CPU and GPU heterogeneous cluster. The method comprises the steps that a data transmission consistency detection model is constructed and used for detecting consistency of data transmission; a data access consistency model is constructed and used for realizing consistency of data access between a CPU and a GPU; a data operation result correctness detection model is constructed and used for detecting the correctness of a thread data operation result; a service backup model is constructed on an application layer and used for backing up historical records of service running; and a service job information backup model is constructed on a system layer and used for backing up job information of service running. In this way, when a non-physical damage fault occurs to the CPU and GPU heterogeneous cluster, a service fault is quickly positioned for business personnel, a pre-fault state is extracted, a service is reset quickly, and losses are reduced.
Owner:北京丁牛科技有限公司
COHERENCY DRIVEN ENHANCEMENTS TO A PERIPHERAL COMPONENT INTERCONNECT (PCI) EXPRESS (PCIe) TRANSACTION LAYER
InactiveUS20160371222A1Memory architecture accessing/allocationMemory adressing/allocation/relocationRoot complexOperating system
Coherency driven enhancements to a PCIe transaction layer are disclosed. In an exemplary aspect, a coherency agent is added to a PCIe system to support a relaxed consistency model for use of memory therein. In particular, endpoints can request ownership of portions of the memory to read from and write to the memory. The coherency agent assigns an address range including the requested portions. The requesting endpoint copies the contents of the memory corresponding to the assigned address range into local endpoint memory to perform read and write operations locally. The owning endpoint may provide an updated snapshot of the copied memory contents upon request. At completion of use of the copied memory contents, or upon request from the coherency agent, ownership of the address range reverts back to the root complex, and the endpoint sends the updated contents back to the address range in the system memory element.
Owner:QUALCOMM INC
Architecture support of memory access coloring
ActiveUS20080168239A1Appropriate granularityProvide feedbackMemory adressing/allocation/relocationGranularitySoftware
Memory Access Coloring provides architecture support that allows software to classify memory accesses into different congruence classes by specifying a color for each memory access operation. The color information is received and recorded by the underlying system with appropriate granularity. This allows hardware to monitor color-based cache monitoring information and provide such feedback to the software to enable various runtime optimizations. It also enables enforcement of different memory consistency models for memory regions with different colors at the same time.
Owner:IBM CORP
Method and system of coordinating control point state in a home environment
A distributed coordination system for a home network environment provides data and functional coordination among multiple control points in a networked home environment. Data and other services (e.g., events) are duplicated among multiple control points. The duplication allows multiple control points to function independently regardless of other control points. Coordination involves the synchronization of runtime state among multiple entities in the network. The distributed coordination system uses a weak consistency model to replicate data and coordinated functions (e.g., event notification) among heterogeneous controlling devices, such as DVD player, speaker, thermostat, with low overhead in a home network. The data replication and function coordination enable software components and / or users to access them without tying themselves to ensuring certain data on a specific control point. In addition, in case, one or more control points go offline, the replicas on other available control points can continue to serve requests and share state.
Owner:SAMSUNG ELECTRONICS CO LTD
Automatic detection method of digital audio tampering based on grid frequency fluctuation super vector
ActiveCN108766464AEliminate experiential behaviorImprove classification accuracySpeech analysisDigital signal processingFeature set
The invention, which belongs to the technical field of digital audio signal processing, discloses an automatic detection method of digital audio tampering based on a grid frequency fluctuation super vector. A phase spectrum and an instantaneous frequency spectrum that are sensitive to signal truncation in an ENF signal are analyzed, effective feature sets are extracted effectively, and the extracted feature sets are fused; and background modeling is carried out only on a great number of original voice signals including voice signals with various signal to noise ratios, even some defected voicesignals, wherein the background model is not sensitive to the signal tampering type because the operation process conforms to the actual detection situation and thus various tampered audio data can be detected effectively. According to the invention, the consistency model of the same class of voice signals is established; lots of features irrelevant to the kind of attribute are filtered adaptively; and the adaptive part can be adjusted by the user, so that the good robustness is realized.
Owner:HUAZHONG NORMAL UNIV
Random evolution constraint SAR radiometric calibration method
ActiveCN108983172AImprove robustnessMeet automatic calibrationRadio wave reradiation/reflectionAlgorithmCurve fitting
The invention discloses a random evolution constraint SAR radiometric calibration method, and the method comprises the following steps: obtaining a SAR image of a calibration field and the informationof a calibrator, and setting a calibration precision threshold value zeta<thred>; performing the random sampling of a sample interior point of the calibrator; performing the iterative evolution of the SAR radiometric calibration; and performing the optimization and outputting of a calibration result based on the precision constraint. The method obtains the image of the calibration field and the data and information of the calibrator through the imaging flight of an aerial carrier, employs as few sample points as possible for estimation and calibration via the random sampling of the sample interior points of the calibrator, the given constraint meeting of the precision of radiometric calibration and the iterative evolution of the number of sample interior points and the number of curve fitting orders through combining a random sampling consistency model and a conventional SAR radiometric calibration method, achieves the verification of the calibration precision through the adding of the remaining sample points, irons out the defects of the conventional SAR radiometric calibration method, alleviates the impact on the precision of the radiometric calibration from abnormal data when there is a severely wrong point, and greatly improves the robustness of the SAR radiometric calibration.
Owner:CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
Full-automatic efficient calculation color conformity method
The invention discloses a full-automatic efficient calculation color conformity method. The method comprises calculating the average of respective color channels of original RGB images, calculating the image average through the color average, blending global color and local color characteristics by using the averages and by the aid of the camera color filtering structure and the color tone consistency model to perform color correction on each pixel of each color channel of the images adaptively, and a user can further adjust parameters according to own requirements according to the corrected images to obtain better results. The simulation method experiment result shows that the raised method can obtain a delightful visual effect.
Owner:SHANGHAI JIAO TONG UNIV
Materialized view layout in distributive system under column-orientated storage environment and maintaining method of materialized view layout
InactiveCN102567527AEnsure consistencySpecial data processing applicationsDistributed File SystemStorage model
The invention belongs to the technical field of databases, in particular discloses a materialized view layout in a distributive system under a column-orientated storage environment and a maintaining method of the materialized view layout. The invention comprises a high-expandability data layout strategy and a method for efficiently maintaining consistency of views. According to the invention, a relational data sheet is stored by using a column-orientated storage model, and the materialized view layout in the distributive system under the column-orientated storage environment is maintained by introducing a consistency model. The invention is suitable for large-scale distributed file systems of the column-orientated storage environment, and provides a data management solution for a data analysis-orientated application.
Owner:EAST CHINA NORMAL UNIV
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