73results about How to "Scale down" patented technology

A process for fabricating phase-change elements having ultra small cross-sectional areas for use in phase change memory cells specifically and in semiconductor devices generally in which pads are implemented to create horizontally aligned phase change elements is disclosed. The elements thus defined may be used within chalcogenide memory cells or other semiconductor devices.

A system for optimizing the performance of a website that runs on one or more HTTP servers and is configured to receive HTTP requests from one or more clients via user agents and provide HTTP responses to the one or more clients includes an intermediary component configured to connect to the clients and the servers via network connections. The intermediary component includes a traffic management system (TMS) that includes means for managing HTTP requests originating from the clients and targeting the servers and HTTP responses originating from the servers and targeting the clients and means for redirecting the HTTP requests to the intermediary component. The intermediary component further includes a traffic processing system that includes means for receiving the redirected HTTP requests and the HTTP responses and means for applying optimization techniques to the redirected HTTP requests and the HTTP responses.

A process for fabricating phase-change elements having ultra small cross-sectional areas for use in phase change memory cells specifically and in semiconductor devices generally in which pads are implemented to create horizontally aligned phase change elements is disclosed. The elements thus defined may be used within chalcogenide memory cells or other semiconductor devices.

A spatial light modulator for use in projection display applications is provided. The spatial light modulator includes a substrate including a plurality of electrically active circuits and an electrode layer electrically coupled to at least one of the plurality of electrically active circuits. In one embodiment, the electrode layer includes a semi-continuous layer with at least one optical path. The spatial light modulator also includes a shielding layer electrically isolated from the electrode layer and disposed between the substrate and the plurality of electrically active circuits and an electrical connector coupling the shielding layer to a reference potential. In a specific embodiment, the shielding layer of the spatial light modulator converts incident light energy to electrical current and routes the current back to a source. In another specific embodiment, the shielding layer converts electrical field disturbance to electrical current and routes the current back to a source.

The self-aligned trench-type DMOS transistor structure comprises a self-aligned source region being surrounded by a trench gate region. The self-aligned source region comprises a moderately-doped p-base diffusion region formed in a lightly-doped epitaxial semiconductor substrate, a self-aligned heavily-doped n+ source diffusion ring formed in a side surface portion of the moderately-doped p-base diffusion region, a heavily-doped p+ contact diffusion region formed in a surface portion of the moderately-doped p-base diffusion region surrounded by the heavily-doped n+ source diffusion ring, and a self-aligned source contact window formed by a semiconductor surface surrounded by a sidewall dielectric spacer. The trench gate region comprises a gate dielectric layer being lined over a trenched semiconductor surface with or without a thicker isolation dielectric layer formed on a bottom trenched semiconductor surface and a self-aligned highly conductive gate layer being formed at least over the gate dielectric layer.

An integrated circuit for controlling a power supply circuit which delivers power to a load circuit that includes a fluorescent lamp, comprising ballast control and drive circuitry that provides drive signals to the power supply circuit, receives sense signals indicating operating conditions of at least one of the power supply circuit and the load circuit, and responds to the sense signals by modifying the drive signals; and including adaptive zero-voltage-switching and minimum-current-switching (ZVMCS) circuitry, wherein the ZVMCS circuitry senses an output of the power supply circuit, and in response thereto, controls the drive circuitry to maintain the power supply circuit under ZVMCS conditions. The power supply circuit includes a half-bridge circuit with low and high side power devices, the drive signals including low side drive signals to control the low side power device and high side drive signals to control the high side power device; the ballast control and drive circuitry including a low side drive output for providing the low side drive signals to the low side power device and a high side drive output for providing the high side drive signals to the high side power device. The ZVMCS circuit senses an output voltage and / or current at the half-bridge circuit between said high side and low side power devices at a switching time of one of the power devices, and controls the drive signals so as to maintain the output voltage and / or current near or at zero at said switching time.

In one embodiment, the present invention includes a method for determining process corner information of an integrated circuit (IC) and controlling at least one analog current for at least one analog circuit of the IC based on the process corner information. More specifically, if the process corner information is indicative of a fast corner IC, the analog current may be scaled down. At the same time that the analog current is scaled down, a current consumption level of digital circuitry of the IC may increase. In this way, overall power consumption of the IC may be reduced to the extent that the analog current(s) are scaled.

Vector processing engines (VPEs) employing a tapped-delay line(s) for providing precision correlation / covariance vector processing operations with reduced sample re-fetching and / or power consumption are disclosed. The VPEs disclosed herein are configured to provide correlation / covariance vector processing operations, such as code division multiple access (CDMA) correlation / covariance vector processing operations as a non-limiting example. A tapped-delay line(s) is included in the data flow paths between memory and execution units in the VPE. The tapped-delay line (s) is configured to receive and provide an input vector data sample set to execution units for performing correlation / covariance vector processing operations. The tapped-delay line(s) is also configured to shift the input vector data sample set for each filter delay tap and provide the shifted input vector data sample set to the execution units, so the shifted input vector data sample set need not be re-fetched from the vector data file during the filter vector processing operations.

A method for adaptively performing video decoding includes: performing decoding complexity management based upon bit stream information of an input bit stream, in order to determine whether to reduce decoding complexity of at least one component of a plurality of components within an adaptive complexity video decoder; and selectively reducing decoding complexity of a portion of components within the adaptive complexity video decoder. An associated adaptive complexity video decoder and an associated adaptive audio / video playback system are also provided. In particular, the adaptive complexity video decoder includes a plurality of components and a decoding complexity manager. When needed, the decoding complexity manager delays audio playback of audio information.

An optical modulation apparatus that performs optimum bias voltage control for optical modulation without using a pilot tone. A drive unit generates a drive signal by adding a bias voltage to an input data signal. A light modulation unit modulates input light output from a light source unit, in accordance with the drive signal, and outputs the results as optical signals. A forward monitoring unit monitors a forward signal of the light modulation unit and outputs the forward signal. A reverse monitoring unit monitors a reverse signal of the light modulation unit and outputs a reverse signal. A bias control unit controls the bias voltage so that a measured monitor ratio matches a target value of the ratio between the forward signal and the reverse signal, obtained when the operating point of the light modulation unit is in a predetermined position on its operation characteristic curve.

A method and system for forming a non-volatile memory structure. The method includes providing a semiconductor substrate and forming a gate dielectric layer overlying a surface region of the semiconductor substrate. A polysilicon gate structure is formed overlying the gate dielectric layer. The method subjects the polysilicon gate structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying the polysilicon gate structure and formation of an undercut region underneath the polysilicon gate structure. An aluminum oxide material is formed overlying the polysilicon gate structure filling the undercut region. In a specific embodiment, the aluminum oxide material has a nanocrystalline silicon material sandwiched between a first aluminum oxide layer and a second aluminum oxide layer. The aluminum oxide material is subjected to a selective etching process while maintaining the aluminum oxide material in an insert region in a portion of the undercut region. The method forms a sidewall structure overlying a side region of the polysilicon gate structure.

A spatial light modulator for use in projection display applications is provided. The spatial light modulator includes a substrate including a plurality of electrically active circuits and an electrode layer electrically coupled to at least one of the plurality of electrically active circuits. In one embodiment, the electrode layer includes a semi-continuous layer with at least one optical path. The spatial light modulator also includes a shielding layer electrically isolated from the electrode layer and disposed between the substrate and the plurality of electrically active circuits and an electrical connector coupling the shielding layer to a reference potential. In a specific embodiment, the shielding layer of the spatial light modulator converts incident light energy to electrical current and routes the current back to a source. In another specific embodiment, the shielding layer converts electrical field disturbance to electrical current and routes the current back to a source.