3230 results about "Video decoding" patented technology

In a digital cinema network of NTP-timekeeping devices in which one of the devices decodes video information, the scheduling of future instructions takes into account the differences between the nominal and actual frame rates of the video decoding device and the network's NTP latency.

A method and apparatus for video encoding, predecoding, and video decoding for video streaming services. The video encoding method includes encoding first and second video sequences into first and second bitstreams using scalable video coding, wherein at least one of resolution, frame rate, and image quality of the second video sequence is different from that of the first video sequence, and combining the first and second bitstreams into a super bitstream.

There are provided methods and apparatus for adaptive geometric partitioning for video encoding and decoding. An apparatus includes an encoder (900) for encoding image data corresponding to pictures by adaptively partitioning at least portions of the pictures responsive to at least one parametric model. The at least one parametric model involves at least one of implicit and explicit formulation of at least one curve.

An advanced multiplexer designed and optimized for next generation on-demand video distribution is described. Features and capabilities include low-latency client interactions, quality of service management, session based encryption management, support for multiple video formats, and support for multiple video decoding standards. Indicators are embedded in new video segments to identify start-of-segment transition points, enabling rapid transitions from one video segment to another. Low-latency operation is achieved by rapid switching, and by coordinating flushing of video buffers and buffer restoration.

A video encoding apparatus and method and a video decoding apparatus and method are provided. The video encoding apparatus includes a base layer encoding unit generating a base layer bitstream including a quantization level of video data and a base quantization parameter corresponding to a base bit-depth, an enhancement layer encoding unit generating an enhancement layer bitstream including a refined quantization parameter for refining the difference between an extended bit-depth and the base bit-depth, and a bitstream combining unit combining the base layer bitstream and the enhancement layer bitstream to generate the scalable bitstream. The video decoding apparatus includes a base layer decoding unit decoding a base layer bitstream including a quantization level of video data and a base quantization parameter corresponding to a base bit-depth in a received bitstream to obtain a base restoration image, an enhancement layer decoding unit decoding an enhancement layer bitstream including a refined quantization parameter for refining the difference between an extended bit-depth and the base bit-depth in the received bitstream, and a bit-depth restoration unit obtaining an extended restoration image corresponding to an extended bit-depth by using the decoded quantization level, the decoded base quantization parameter, and the decoded refined quantization parameter.

Exemplary embodiments of methods and apparatuses to dynamically redistribute computational processes in a system that includes a plurality of processing units are described. The power consumption, the performance, and the power / performance value are determined for various computational processes between a plurality of subsystems where each of the subsystems is capable of performing the computational processes. The computational processes are exemplarily graphics rendering process, image processing process, signal processing process, Bayer decoding process, or video decoding process, which can be performed by a central processing unit, a graphics processing units or a digital signal processing unit. In one embodiment, the distribution of computational processes between capable subsystems is based on a power setting, a performance setting, a dynamic setting or a value setting.

A method of video decoding is provided that includes receiving a data stream comprising a sequence of syntax elements that were compressed using context-adaptive binary arithmetic coding (CABAC), such that the encoding of each bin of a bin string representative of a syntax element was performed by arithmetic encoding. Two consecutive bins of a syntax element are decoded in parallel. Speculative computation and prefetching is used to reduce the critical path and thereby improve processing speed.

A video decoding apparatus includes a bitstream parser, a calculator and a memory. The bitstream parser is provided to receive a video bitstream and extracting a set of constraints associated with the video bitstream, wherein the set of constraints has information associated with a direct_8×8_inference flag for a macroblock of a picture, wherein the macroblock has N sub-macroblock partitions. The calculator is provided to calculate first motion vector information associated with the macroblock and obtain second motion vector information associated with K of the N sub-macroblock partitions from the first motion vector information according to the information associated with the direct_8×8_inference flag, wherein K is less than N. The memory is provided to store the second motion vector information.

Provided is a video encoding / decoding technique for improving the compression efficiency by reducing the motion vector code amount. In a video decoding process, the prediction vector calculation method is switched from one to another in accordance with a difference between predetermined motion vectors among a plurality of motion vectors of a peripheral block of a block to be decoded and already decoded. The calculated prediction vector is added to a difference vector decoded from an encoded stream so as to calculate a motion vector. By using the calculated motion vector, the inter-image prediction process is executed.

HDTV video decoder circuit is disclosed, which has an +E,fra 1 / 4+EE size frame memory for a progressive scanned or interlace scanned video and yet can conduct IDCT and motion compensation to fit to the reduced frame memory size, which, in comparison to a conventional MPEG-2 video decoder which uses a 4x4 IDCT that requires +E,fra 1 / 4+EE frame memory in encoding an interlace scanned image into frame picture only to lose field information of the image resulting in a significant damage to the picture quality, facilitates to maintain the field information as it was resulting in an improvement in the picture quality.

A method and system for reducing computation complexity of an MPEG digital video decoder system by scaling down the computation of motion compensation during the decoding process are provided. The video processing system processes incoming MPEG video signals including a plurality of macroblocks with a motion vector associated therewith. A non full-pel vector is converted to a full-pel motion vector on a P frame and a B frame, or on a combination of P and B frames, by rounding an odd number vector to the nearest even number vector. Then, a motion compensated MPEG video picture is performed based on the converted full-pel motion vector. As a result, a. substantial computational overhead associated with interpolation is desirably avoided.

Provided is an apparatus, medium, and method for processing neighbor information in a video decoder that can minimize the number of memory accesses. The apparatus includes a neighbor information providing unit and a storage unit. If at least one spatially neighboring block of a current block exists in memory, the neighbor information providing unit can access information of all neighbor blocks from the memory and provides the accessed information as neighbor information. The storage unit stores the neighbor information provided by the neighbor information providing unit and outputs the stored neighbor information to the plurality of modules.

It is an object of the present invention to provide a video coding method and a video decoding method which allow enhancement of coding efficiency and improvement in video quality. A video coding apparatus (100) includes: a mode determination unit (111) which determines a notification method for notifying a transform block size to be used in orthogonal transform of a current block to be either the implicit mode or the explicit mode, and outputs the ABT mode indicating the determined notification method; an orthogonal transformation unit (104) which transforms the difference values between the input image and predicted image into frequency coefficients based on the transform block size determined in accordance with the determined notification method; a quantization unit (105) which quantizes the frequency coefficients and output the quantized values; and a variable length coding unit (110) which performs variable length coding on the quantized values, the ABT mode, and the like, so as to output a coded stream.

Accelerated video decoding makes use of FEC-repaired media packets that become available through FEC decoding later than their intended decoding time, so to re-establish the integrity of the prediction chain between predicted pictures. The decoder state may be stored at the time of reception of an erroneous packet or at the time of identification of a lost packet, and decoding continued. After FEC repair, the last known state of the decoder is restored after the lost / damaged packet(s) is (are) resurrected through FEC, and accelerated decoding accordingly is used. Cycles “reserved” for decoding of a sub-sequence may be utilized. By freezing the decoded frame at the begin of a sub-sequence and decoding coded pictures of the main sequence that are part of the previous FEC block the integrity of the main prediction chain may be established again. Alternatively, cycles from enhancement layer decoding may be used.