50results about How to "Reduce surface unevenness" patented technology

The present invention improves the reliability of wirings, facilitates the orientation control of liquid crystal, or improves a reflectance of a reflective liquid crystal display device. In the case where a plurality of leveling films are laminated, a first leveling film is formed to have a thickness smaller than that of a second leveling film, thereby realizing a higher leveling rate. Therefore, unevenness of the surface due to level differences is reduced, and it becomes possible to attain the above objects.

An objective is simplification of a manufacturing method of a liquid crystal display device or the like. In a manufacturing method of a thin film transistor, a stack in which a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked in this order is formed, and the first conductive film is exposed by first etching and a pattern of the second conductive film is formed by second etching. Further, after thin film transistors are formed, a color filter layer is formed so that unevenness caused by the thin film transistors or the like is relieved; thus, the level difference of the surface where the pixel electrode layer is formed is reduced. Alternatively, a color filter layer is selectively formed utilizing the unevenness caused by thin film transistors or the like.

A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 μm. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.

Fixedly joining sections are provided on opposed joining edges of left and right undercover members defining part of an engine space of an outboard engine unit. The opposed joining edges are abutted against each other with the joining sections of the left and right undercover members overlapped in face-to-face relation with each other in a front-and-rear direction of the outboard engine unit. Fasteners, such as bolts, fasten together the overlapped joining sections in the front-and-rear direction, to thereby join together the left and right undercover members. The joining sections may be provided on frame members integrally secured to the respective inner side surfaces of resin-made outer wall sections of the left and right undercover members.

An SOI substrate having a single crystal semiconductor layer with high surface planarity is manufactured. A semiconductor substrate is doped with hydrogen, whereby a damaged region which contains large quantity of hydrogen is formed. After a single crystal semiconductor substrate and a supporting substrate are bonded together, the semiconductor substrate is heated, whereby the single crystal semiconductor substrate is separated in the damaged region. While a heated high-purity nitrogen gas is sprayed on a separation plane of the single crystal semiconductor layer separated from the single crystal semiconductor substrate, laser beam irradiation is performed. By irradiation with a laser beam, the single crystal semiconductor layer is melted, whereby planarity of the surface of the single crystal semiconductor layer is improved and re-single-crystallization is performed.

The invention belongs to the technical field of microelectronic devices and memories, and discloses a three-dimensional stacked phase change memory and a preparation method thereof. The preparation method specifically comprises the following steps of preparing a multi-layer structure on which a horizontal electrode layer and an insulating layer are crossly stacked, on a substrate; then etching toform a groove and a discrete three-dimensional strip-shaped electrode; filling an insulating medium in the groove, forming small holes in the boundary area of the three-dimensional strip-shaped electrode and the insulating medium, sequentially depositing a phase change material on the walls of the small holes, and filling an electrode material in the small holes to prepare a vertical electrode, thereby obtaining the multi-layer stacked three-dimensional stacked phase change memory. According to the present invention, by improving the whole flow process of the preparation method, a three-dimensional phase change memory array can be established by utilizing the vertical electrode structure, and compared with the prior art, the problems of complex multi-layer stacking steps, high process implementation difficulty, unit size miniaturization and the like of an existing three-dimensional stacked phase change memory in process preparation, can be effectively solved.

Provided are a toner containing at least a binder resin and a colorant, the toner having a specific hue angle and an absorbance at a specific wavelength in reflectance spectrophotometry, and a full-color image-forming method involving the use of the toner, the method including the steps of: forming an electrostatic image on a charged electrostatic image bearing member; developing the formed electrostatic image with the toner to form a toner image; transferring the formed toner image onto a transfer material; and fixing the transferred toner image to the transfer material to form a fixed image.

An ink composition having a colorant; a binder resin; and a solvent; wherein the elongation ratio of the binder resin is 400% to 3,000%; wherein the binder resin comprises a urethane resin and a vinyl chloride / vinyl acetate copolymer, and the mixing ratio of the urethane resin:vinyl chloride / vinyl acetate copolymer relative to the total weight of the urethane resin and the vinyl chloride / vinyl acetate copolymer is 50:50 to 99:1; and wherein the urethane resin comprises a urethane-urea resin that is obtained by a process comprising reacting dibutylamine and a urethane prepolymer obtained by a process comprising reacting a polymeric polyol component having a number average molecular weight of 500 to 10,000 and an organic diisocyanate component having terminal isocyanate groups. A heat insulating foamed paper container material having at least one print pattern formed from said ink composition.